misc: Drop print_ implementation from non-romcc boards

Because we had no stack on romcc boards, we had a separate, not as
powerful clone of printk: print_*.

Back in the day, like more than half a decade ago, we migrated a lot
of boards to printk, but we never cleaned up the existing code to be
consistent. Instead, we worked around the problem with a very messy
console.h (nowadays the mess is hidden in romstage_console.c and
early_print.h)

This patch cleans up the generic code pieces to use printk() on all
non-ROMCC boards.

Our two remaining ROMCC boards are fixed up in this commit:
bifferos/bifferboard and dmp/vortex86ex.

Change-Id: I16676eeabe5c892c8e3c9f3c0cd3bae2e8fd74b6
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/8115
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Andrew Wu <arw@dmp.com.tw>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Stefan Reinauer
2015-01-05 13:12:38 -08:00
committed by Kyösti Mälkki
parent c62ee70b6e
commit d6865222c8
14 changed files with 48 additions and 243 deletions

View File

@@ -21,12 +21,8 @@
static void print_debug_pci_dev(unsigned dev)
{
print_debug("PCI: ");
print_debug_hex8((dev >> 16) & 0xff);
print_debug_char(':');
print_debug_hex8((dev >> 11) & 0x1f);
print_debug_char('.');
print_debug_hex8((dev >> 8) & 7);
printk(BIOS_DEBUG, "PCI: %02x:%02x.%x",
(dev >> 16) & 0xff, (dev >> 11) & 0x1f, (dev >> 8) & 7);
}
static inline void print_pci_devices(void)
@@ -42,7 +38,7 @@ static inline void print_pci_devices(void)
continue;
}
print_debug_pci_dev(dev);
print_debug("\n");
printk(BIOS_DEBUG, "\n");
}
}
@@ -50,20 +46,16 @@ static void dump_pci_device(unsigned dev)
{
int i;
print_debug_pci_dev(dev);
print_debug("\n");
printk(BIOS_DEBUG, "\n");
for (i = 0; i <= 255; i++) {
unsigned char val;
if ((i & 0x0f) == 0) {
print_debug_hex8(i);
print_debug_char(':');
}
if ((i & 0x0f) == 0)
printk(BIOS_DEBUG, "%02x:", i);
val = pci_read_config8(dev, i);
print_debug_char(' ');
print_debug_hex8(val);
if ((i & 0x0f) == 0x0f) {
print_debug("\n");
}
printk(BIOS_DEBUG, " %02x", val);
if ((i & 0x0f) == 0x0f)
printk(BIOS_DEBUG, "\n");
}
}
@@ -86,22 +78,16 @@ static inline void dump_pci_devices(void)
static inline void dump_io_resources(unsigned port)
{
int i;
print_debug_hex16(port);
print_debug(":\n");
printk(BIOS_DEBUG, "%04x:\n", port);
for (i = 0; i < 256; i++) {
u8 val;
if ((i & 0x0f) == 0) {
print_debug_hex8(i);
print_debug_char(':');
}
if ((i & 0x0f) == 0)
printk(BIOS_DEBUG, "%02x:", i);
val = inb(port);
print_debug_char(' ');
print_debug_hex8(val);
if ((i & 0x0f) == 0x0f) {
print_debug("\n");
}
printk(BIOS_DEBUG, " %02x", val);
if ((i & 0x0f) == 0x0f)
printk(BIOS_DEBUG, "\n");
port++;
}
}

View File

@@ -6,60 +6,46 @@
static void dump_spd_registers(const struct mem_controller *ctrl)
{
int i;
print_debug("\n");
printk(BIOS_DEBUG, "\n");
for(i = 0; i < 4; i++) {
unsigned device;
device = ctrl->channel0[i];
if (device) {
int j;
print_debug("dimm: ");
print_debug_hex8(i);
print_debug(".0: ");
print_debug_hex8(device);
printk(BIOS_DEBUG, "dimm: %02x.0: %02x", i, device);
for(j = 0; j < 256; j++) {
int status;
unsigned char byte;
if ((j & 0xf) == 0) {
print_debug("\n");
print_debug_hex8(j);
print_debug(": ");
}
if ((j & 0xf) == 0)
printk(BIOS_DEBUG, "\n%02x: ", j);
status = spd_read_byte(device, j);
if (status < 0) {
print_debug("bad device\n");
printk(BIOS_DEBUG, "bad device\n");
break;
}
byte = status & 0xff;
print_debug_hex8(byte);
print_debug_char(' ');
printk(BIOS_DEBUG, "%02x ", byte);
}
print_debug("\n");
printk(BIOS_DEBUG, "\n");
}
device = ctrl->channel1[i];
if (device) {
int j;
print_debug("dimm: ");
print_debug_hex8(i);
print_debug(".1: ");
print_debug_hex8(device);
printk(BIOS_DEBUG, "dimm: %02x.1: %02x", i, device);
for(j = 0; j < 256; j++) {
int status;
unsigned char byte;
if ((j & 0xf) == 0) {
print_debug("\n");
print_debug_hex8(j);
print_debug(": ");
}
if ((j & 0xf) == 0)
printk(BIOS_DEBUG, "\n%02x: ");
status = spd_read_byte(device, j);
if (status < 0) {
print_debug("bad device\n");
printk(BIOS_DEBUG, "bad device\n");
break;
}
byte = status & 0xff;
print_debug_hex8(byte);
print_debug_char(' ');
printk(BIOS_DEBUG, "%02x ", byte);
}
print_debug("\n");
printk(BIOS_DEBUG, "\n");
}
}
}

View File

@@ -1,14 +1,5 @@
#include <lib.h> /* Prototypes */
static inline void print_debug_sdram_8(const char *strval, uint32_t val)
{
#if CONFIG_CACHE_AS_RAM
printk(BIOS_DEBUG, "%s%02x\n", strval, val);
#else
print_debug(strval); print_debug_hex8(val); print_debug("\n");
#endif
}
/* Setup SDRAM */
#if CONFIG_RAMINIT_SYSINFO
void sdram_initialize(int controllers, const struct mem_controller *ctrl, void *sysinfo)
@@ -19,7 +10,7 @@ void sdram_initialize(int controllers, const struct mem_controller *ctrl)
int i;
/* Set the registers we can set once to reasonable values */
for(i = 0; i < controllers; i++) {
print_debug_sdram_8("Ram1.", i);
printk(BIOS_DEBUG, "Ram1.%02x\n", i);
#if CONFIG_RAMINIT_SYSINFO
sdram_set_registers(ctrl + i, sysinfo);
@@ -30,7 +21,7 @@ void sdram_initialize(int controllers, const struct mem_controller *ctrl)
/* Now setup those things we can auto detect */
for(i = 0; i < controllers; i++) {
print_debug_sdram_8("Ram2.", i);
printk(BIOS_DEBUG, "Ram2.%02x\n", i);
#if CONFIG_RAMINIT_SYSINFO
sdram_set_spd_registers(ctrl + i, sysinfo);
@@ -44,7 +35,7 @@ void sdram_initialize(int controllers, const struct mem_controller *ctrl)
* Some chipsets do the work for us while on others
* we need to it by hand.
*/
print_debug("Ram3\n");
printk(BIOS_DEBUG, "Ram3\n");
#if CONFIG_RAMINIT_SYSINFO
sdram_enable(controllers, ctrl, sysinfo);
@@ -52,5 +43,5 @@ void sdram_initialize(int controllers, const struct mem_controller *ctrl)
sdram_enable(controllers, ctrl);
#endif
print_debug("Ram4\n");
printk(BIOS_DEBUG, "Ram4\n");
}

View File

@@ -74,7 +74,7 @@ static void run_ramstage_from_resume(struct romstage_handoff *handoff)
entry = load_cached_ramstage(handoff, cbmem_entry);
if (entry != NULL) {
print_debug("Jumping to image.\n");
printk(BIOS_DEBUG, "Jumping to image.\n");
stage_exit(entry);
}
}

View File

@@ -83,13 +83,7 @@ static int ram_bitset_nodie(unsigned long start)
unsigned char failed, failures;
uint8_t verbose = 0;
#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "DRAM bitset write: 0x%08lx\n", start);
#else
print_debug("DRAM bitset write: 0x");
print_debug_hex32(start);
print_debug("\n");
#endif
for (idx=0; idx<0x400; idx+=4) {
test_pattern(idx, &addr, &value);
write_phys(start + addr, value);
@@ -98,13 +92,7 @@ static int ram_bitset_nodie(unsigned long start)
/* Make sure we don't read before we wrote */
phys_memory_barrier();
#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "DRAM bitset verify: 0x%08lx\n", start);
#else
print_debug("DRAM bitset verify: 0x");
print_debug_hex32(start);
print_debug("\n");
#endif
failures = 0;
for (idx=0; idx<0x400; idx+=4) {
test_pattern(idx, &addr, &value);
@@ -113,20 +101,10 @@ static int ram_bitset_nodie(unsigned long start)
failed = (value2 != value);
failures |= failed;
if (failed && !verbose) {
#if !defined(__ROMCC__)
printk(BIOS_ERR, "0x%08lx wr: 0x%08lx rd: 0x%08lx FAIL\n",
start + addr, value, value2);
#else
print_err_hex32(start + addr);
print_err(" wr: 0x");
print_err_hex32(value);
print_err(" rd: 0x");
print_err_hex32(value2);
print_err(" FAIL\n");
#endif
}
if (verbose) {
#if !defined(__ROMCC__)
if ((addr & 0x0f) == 0)
printk(BIOS_DEBUG, "%08lx wr: %08lx rd:",
start + addr, value);
@@ -136,39 +114,14 @@ static int ram_bitset_nodie(unsigned long start)
printk(BIOS_DEBUG, " %08lx ", value2);
if ((addr & 0x0f) == 0xc)
printk(BIOS_DEBUG, "\n");
#else
if ((addr & 0x0f) == 0) {
print_dbg_hex32(start + addr);
print_dbg(" wr: ");
print_dbg_hex32(value);
print_dbg(" rd: ");
}
print_dbg_hex32(value2);
if (failed)
print_dbg("! ");
else
print_dbg(" ");
if ((addr & 0x0f) == 0xc)
print_dbg("\n");
#endif
}
}
if (failures) {
post_code(0xea);
#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "\nDRAM did _NOT_ verify!\n");
#else
print_debug("\nDRAM did _NOT_ verify!\n");
#endif
return 1;
}
else {
#if !defined(__ROMCC__)
} else {
printk(BIOS_DEBUG, "\nDRAM range verified.\n");
#else
print_debug("\nDRAM range verified.\n");
return 0;
#endif
}
return 0;
}
@@ -181,20 +134,10 @@ void ram_check(unsigned long start, unsigned long stop)
* test than a "Is my DRAM faulty?" test. Not all bits
* are tested. -Tyson
*/
#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "Testing DRAM at: %08lx\n", start);
#else
print_debug("Testing DRAM at: ");
print_debug_hex32(start);
print_debug("\n");
#endif
if (ram_bitset_nodie(start))
die("DRAM ERROR");
#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "Done.\n");
#else
print_debug("Done.\n");
#endif
}
@@ -206,20 +149,10 @@ int ram_check_nodie(unsigned long start, unsigned long stop)
* test than a "Is my DRAM faulty?" test. Not all bits
* are tested. -Tyson
*/
#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "Testing DRAM at : %08lx\n", start);
#else
print_debug("Testing DRAM at : ");
print_debug_hex32(start);
print_debug("\n");
#endif
ret = ram_bitset_nodie(start);
#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "Done.\n");
#else
print_debug("Done.\n");
#endif
return ret;
}