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soc/intel/skylake: Allow setting of PcieRpMaxPayload

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Add setting of the MaxPayload for each root port from the device tree.

By default MaxPayload is set to 128 bytes. This change allows changing
to 256 bytes.

BUG=N/A
TEST=tested on facebook monolith

Change-Id: I61e1d619588a7084d52bbe101acd757cc7293cac
Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41170
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
This commit is contained in:
Wim Vervoorn
2020-05-07 12:41:13 +02:00
committed by Patrick Georgi
parent f5472a10c6
commit d6b682cf92
2 changed files with 8 additions and 0 deletions
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2
src/soc/intel/skylake/chip.c
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@ -188,6 +188,8 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
sizeof(params->PcieRpLtrEnable));
memcpy(params->PcieRpHotPlug, config->PcieRpHotPlug,
sizeof(params->PcieRpHotPlug));
for (i = 0; i < CONFIG_MAX_ROOT_PORTS; i++)
params->PcieRpMaxPayload[i] = config->PcieRpMaxPayload[i];
/*
* PcieRpClkSrcNumber UPD is set to clock source number(0-6) for