util/inteltool: Add chip detection for IceLake chips
Change-Id: Ia4752391e1232ac67d8927778a3a94eec5c68410 Signed-off-by: Johanna Schander <coreboot@mimoja.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37986 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Christoph Pomaska <github@aufmachen.jetzt> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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committed by
Philipp Deppenwiese
parent
8fa02a8ef9
commit
d756c27a54
@ -139,6 +139,8 @@ static const struct {
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"7th generation (Kaby Lake family) Core Processor (Mobile)" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_E3,
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"7th generation (Kaby Lake family) Core Processor Xeon E3-1200" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_10TH_GEN_U,
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"10th generation (Icelake family) Core Processor (Mobile)" },
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/* Southbridges (LPC controllers) */
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371XX, "371AB/EB/MB" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10, "ICH10" },
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@ -216,6 +218,8 @@ static const struct {
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HM75, "HM75" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HM70, "HM70" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_NM70, "NM70" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICELAKE_LP_U,
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"Icelake U LPC" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_FULL,
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"Lynx Point Low Power Full Featured Engineering Sample" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_PREM,
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@ -433,6 +437,8 @@ static const struct {
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"Intel(R) Iris Plus Graphics 650" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IRIS_PLUS_655,
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"Intel(R) Iris Plus Graphics 655" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IRIS_PLUS_G7,
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"Intel(R) Iris Plus Graphics G7" },
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};
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#ifndef __DARWIN__
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