inteltool: Add dumping of full PCR ports

SoCs from Skylake on have many settings as so called private con-
figuration registers (PCRs). These are organized as 256 ports with
a 64KiB space each. We use the Primary to Sideband (P2SB) bridge's
BAR to access them.

Change-Id: Iede4ac601355e2be377bc986d62d20098980ec35
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19593
Reviewed-by: Youness Alaoui <snifikino@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Youness Alaoui
2018-03-13 16:58:52 -04:00
committed by Nico Huber
parent cfd8929ac6
commit d8214d7e0e
3 changed files with 70 additions and 1 deletions

View File

@@ -24,6 +24,8 @@
uint32_t read_pcr32(uint8_t port, uint16_t offset);
void print_pcr_ports(struct pci_dev *sb, const uint8_t *ports, size_t count);
void pcr_init(struct pci_dev *sb);
void pcr_cleanup(void);