src/cpu: Capitalize CPU
Change-Id: I58d5c16de796a91fa14d8db78722024266c09a94 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/15934 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
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Martin Roth
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918535a657
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@@ -57,7 +57,7 @@ static void model_10_init(device_t dev)
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enable_cache();
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/* Enable the local cpu apics */
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/* Enable the local CPU apics */
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setup_lapic();
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/* Set the processor name string */
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@@ -62,7 +62,7 @@ static void model_12_init(device_t dev)
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enable_cache();
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/* Enable the local cpu apics */
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/* Enable the local CPU apics */
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setup_lapic();
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/* Set the processor name string */
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@@ -82,7 +82,7 @@ static void model_14_init(device_t dev)
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wrmsr(MCI_STATUS + (i * 4), msr);
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}
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/* Enable the local cpu apics */
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/* Enable the local CPU apics */
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setup_lapic();
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#if IS_ENABLED(CONFIG_LOGICAL_CPUS)
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@@ -67,7 +67,7 @@ static void model_15_init(device_t dev)
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wrmsr(MCI_STATUS + (i * 4), msr);
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}
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/* Enable the local cpu apics */
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/* Enable the local CPU apics */
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setup_lapic();
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#if IS_ENABLED(CONFIG_LOGICAL_CPUS)
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@@ -81,7 +81,7 @@ static void model_15_init(device_t dev)
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wrmsr(MCI_STATUS + (i * 4), msr);
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}
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/* Enable the local cpu apics */
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/* Enable the local CPU apics */
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setup_lapic();
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#if IS_ENABLED(CONFIG_LOGICAL_CPUS)
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@@ -80,7 +80,7 @@ static void model_15_init(device_t dev)
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wrmsr(MCI_STATUS + (i * 4), msr);
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}
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/* Enable the local cpu apics */
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/* Enable the local CPU apics */
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setup_lapic();
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#if IS_ENABLED(CONFIG_LOGICAL_CPUS)
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@@ -79,7 +79,7 @@ static void model_16_init(device_t dev)
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}
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/* Enable the local cpu apics */
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/* Enable the local CPU apics */
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setup_lapic();
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#if IS_ENABLED(CONFIG_LOGICAL_CPUS)
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@@ -257,7 +257,7 @@ uint32_t wait_cpu_state(uint32_t apicid, uint32_t state, uint32_t state2)
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continue;
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if ((readback & 0x3f) == state || (readback & 0x3f) == state2 || (readback & 0x3f) == F10_APSTATE_RESET) {
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timeout = 0;
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break; //target cpu is in stage started
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break; //target CPU is in stage started
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}
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}
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if (timeout) {
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@@ -133,7 +133,7 @@ static void model_10xxx_init(device_t dev)
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enable_cache();
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/* Enable the local cpu apics */
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/* Enable the local CPU apics */
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setup_lapic();
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/* Set the processor name string */
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@@ -22,7 +22,7 @@ static void geode_gx2_init(device_t dev)
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/* Turn on caching if we haven't already */
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x86_enable_cache();
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/* Enable the local cpu apics */
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/* Enable the local CPU apics */
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//setup_lapic();
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vsm_end_post_smi();
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@@ -75,7 +75,7 @@ static void disablememoryreadorder(void)
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wrmsr(MC_CF8F_DATA, msr);
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}
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/* For cpu version C3. Should be the only released version */
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/* For CPU version C3. Should be the only released version */
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void cpubug(void)
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{
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pcideadlock();
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@@ -40,7 +40,7 @@ static void geode_lx_init(device_t dev)
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/* Turn on caching if we haven't already */
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x86_enable_cache();
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/* Enable the local cpu apics */
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/* Enable the local CPU apics */
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//setup_lapic();
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// do VSA late init
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@@ -401,7 +401,7 @@ static void init_fidvid_ap(unsigned bsp_apicid, unsigned apicid)
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0)
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continue;
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if (((readback >> 24) & 0xff) == apicid)
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break; /* it is this cpu turn */
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break; /* it is this CPU turn */
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}
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if (loop > 0) {
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@@ -157,7 +157,7 @@ static u32 wait_cpu_state(u32 apicid, u32 state)
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continue;
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if ((readback & 0xff) == state) {
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timeout = 0;
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break; //target cpu is in stage started
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break; //target CPU is in stage started
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}
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}
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if (timeout) {
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@@ -303,7 +303,7 @@ static u32 init_cpus(u32 cpu_init_detectedx)
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// start_other_core(id.nodeid); // start second core in first cpu, only allowed for nb_cfg_54 is not set
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}
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//here don't need to wait
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lapic_write(LAPIC_MSG_REG, (apicid << 24) | 0x33); // mark the cpu is started
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lapic_write(LAPIC_MSG_REG, (apicid << 24) | 0x33); // mark the CPU is started
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if (apicid != bsp_apicid) {
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u32 timeout = 1;
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@@ -249,15 +249,15 @@ static void init_ecc_memory(unsigned node_id)
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f1_dev = dev_find_slot(0, PCI_DEVFN(0x18 + node_id, 1));
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if (!f1_dev) {
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die("Cannot find cpu function 1\n");
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die("Cannot find CPU function 1\n");
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}
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f2_dev = dev_find_slot(0, PCI_DEVFN(0x18 + node_id, 2));
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if (!f2_dev) {
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die("Cannot find cpu function 2\n");
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die("Cannot find CPU function 2\n");
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}
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f3_dev = dev_find_slot(0, PCI_DEVFN(0x18 + node_id, 3));
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if (!f3_dev) {
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die("Cannot find cpu function 3\n");
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die("Cannot find CPU function 3\n");
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}
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/* See if we scrubbing should be enabled */
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@@ -508,7 +508,7 @@ static void model_fxx_init(device_t dev)
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/* Set the processor name string */
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init_processor_name();
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/* Enable the local cpu apics */
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/* Enable the local CPU apics */
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setup_lapic();
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#if CONFIG_LOGICAL_CPUS
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@@ -79,7 +79,7 @@ static void model_15_init(device_t dev)
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}
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/* Enable the local cpu apics */
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/* Enable the local CPU apics */
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setup_lapic();
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#if CONFIG_LOGICAL_CPUS
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@@ -94,7 +94,7 @@ static void model_15_init(device_t dev)
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}
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/* Enable the local cpu apics */
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/* Enable the local CPU apics */
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setup_lapic();
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#if CONFIG_LOGICAL_CPUS
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@@ -77,7 +77,7 @@ static void model_16_init(device_t dev)
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}
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/* Enable the local cpu apics */
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/* Enable the local CPU apics */
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setup_lapic();
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#if CONFIG_LOGICAL_CPUS
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