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src/cpu: Capitalize CPU

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Change-Id: I58d5c16de796a91fa14d8db78722024266c09a94
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/15934
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Elyes HAOUAS
2016-07-28 18:58:27 +02:00
committed by Martin Roth
parent 918535a657
commit d82be923b1
54 changed files with 102 additions and 102 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/cpu/intel/Makefile.inc
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@@ -1,5 +1,5 @@
# Note: From here on down, we are socket-centric. Socket choice determines
# what other cpu files are included.
# what other CPU files are included.
#
# Therefore: ONLY include Makefile.inc from socket directories!

2
src/cpu/intel/ep80579/ep80579_init.c
View File

@@ -34,7 +34,7 @@ static void ep80579_init(struct device *dev)
/* Update the microcode */
intel_update_microcode_from_cbfs();
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
};

8
src/cpu/intel/fsp_model_206ax/model_206ax_init.c
View File

@@ -334,7 +334,7 @@ static void intel_cores_init(struct device *cpu)
struct device_path cpu_path;
struct device *new;
/* Build the cpu device path */
/* Build the CPU device path */
cpu_path.type = DEVICE_PATH_APIC;
cpu_path.apic.apic_id =
cpu->path.apic.apic_id + i;
@@ -343,7 +343,7 @@ static void intel_cores_init(struct device *cpu)
if (threads_per_core == 1)
cpu_path.apic.apic_id <<= 1;
/* Allocate the new cpu device structure */
/* Allocate the new CPU device structure */
new = alloc_dev(cpu->bus, &cpu_path);
if (!new)
continue;
@@ -353,7 +353,7 @@ static void intel_cores_init(struct device *cpu)
new->path.apic.apic_id);
#if CONFIG_SMP && CONFIG_MAX_CPUS > 1
/* Start the new cpu */
/* Start the new CPU */
if (!start_cpu(new)) {
/* Record the error in cpu? */
printk(BIOS_ERR, "CPU %u would not start!\n",
@@ -386,7 +386,7 @@ static void model_206ax_init(struct device *cpu)
/* Setup Page Attribute Tables (PAT) */
// TODO set up PAT
/* Enable the local cpu apics */
/* Enable the local CPU apics */
enable_lapic_tpr();
setup_lapic();

8
src/cpu/intel/fsp_model_406dx/model_406dx_init.c
View File

@@ -133,7 +133,7 @@ static void intel_cores_init(struct device *cpu)
struct device_path cpu_path;
struct device *new;
/* Build the cpu device path */
/* Build the CPU device path */
cpu_path.type = DEVICE_PATH_APIC;
cpu_path.apic.apic_id =
cpu->path.apic.apic_id + i;
@@ -142,7 +142,7 @@ static void intel_cores_init(struct device *cpu)
if (threads_per_core == 1)
cpu_path.apic.apic_id <<= 1;
/* Allocate the new cpu device structure */
/* Allocate the new CPU device structure */
new = alloc_dev(cpu->bus, &cpu_path);
if (!new)
continue;
@@ -152,7 +152,7 @@ static void intel_cores_init(struct device *cpu)
new->path.apic.apic_id);
#if IS_ENABLED(CONFIG_SMP) && CONFIG_MAX_CPUS > 1
/* Start the new cpu */
/* Start the new CPU */
if (!start_cpu(new)) {
/* Record the error in cpu? */
printk(BIOS_ERR, "CPU %u would not start!\n",
@@ -182,7 +182,7 @@ static void model_406dx_init(struct device *cpu)
x86_mtrr_check();
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
/* Enable virtualization */

2
src/cpu/intel/haswell/haswell_init.c
View File

@@ -720,7 +720,7 @@ static void haswell_init(struct device *cpu)
/* Clear out pending MCEs */
configure_mca();
/* Enable the local cpu apics */
/* Enable the local CPU apics */
enable_lapic_tpr();
setup_lapic();

8
src/cpu/intel/hyperthreading/intel_sibling.c
View File

@@ -21,7 +21,7 @@
#include <assert.h>
#if CONFIG_PARALLEL_CPU_INIT
#error Intel hyper-threading requires serialized cpu init
#error Intel hyper-threading requires serialized CPU init
#endif
static int first_time = 1;
@@ -84,16 +84,16 @@ void intel_sibling_init(struct device *cpu)
return;
}
/* I am the primary cpu start up my siblings */
/* I am the primary CPU start up my siblings */
for(i = 1; i < siblings; i++) {
struct device_path cpu_path;
struct device *new;
/* Build the cpu device path */
/* Build the CPU device path */
cpu_path.type = DEVICE_PATH_APIC;
cpu_path.apic.apic_id = cpu->path.apic.apic_id + i;
/* Allocate new cpu device structure iff sibling CPU
/* Allocate new CPU device structure iff sibling CPU
* was not in static device tree.
*/
new = alloc_find_dev(cpu->bus, &cpu_path);

2
src/cpu/intel/microcode/Makefile.inc
View File

@@ -1,5 +1,5 @@
################################################################################
## One small file with the awesome super-power of updating the cpu microcode
## One small file with the awesome super-power of updating the CPU microcode
## directly from CBFS. You have been WARNED!!!
################################################################################
ramstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c

4
src/cpu/intel/model_1067x/model_1067x_init.c
View File

@@ -322,7 +322,7 @@ static void model_1067x_init(struct device *cpu)
x86_setup_mtrrs();
x86_mtrr_check();
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
/* Initialize the APIC timer */
@@ -347,7 +347,7 @@ static void model_1067x_init(struct device *cpu)
/* PIC thermal sensor control */
configure_pic_thermal_sensors(tm2, quad);
/* Start up my cpu siblings */
/* Start up my CPU siblings */
intel_sibling_init(cpu);
}

4
src/cpu/intel/model_106cx/model_106cx_init.c
View File

@@ -124,7 +124,7 @@ static void model_106cx_init(struct device *cpu)
x86_setup_mtrrs();
x86_mtrr_check();
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
/* Enable virtualization */
@@ -138,7 +138,7 @@ static void model_106cx_init(struct device *cpu)
/* TODO: PIC thermal sensor control */
/* Start up my cpu siblings */
/* Start up my CPU siblings */
intel_sibling_init(cpu);
}

8
src/cpu/intel/model_2065x/model_2065x_init.c
View File

@@ -329,13 +329,13 @@ static void intel_cores_init(struct device *cpu)
struct device_path cpu_path;
struct device *new;
/* Build the cpu device path */
/* Build the CPU device path */
cpu_path.type = DEVICE_PATH_APIC;
cpu_path.apic.apic_id =
cpu->path.apic.apic_id + (i % threads_per_core)
+ ((i / threads_per_core) << 2);
/* Allocate the new cpu device structure */
/* Allocate the new CPU device structure */
new = alloc_dev(cpu->bus, &cpu_path);
if (!new)
continue;
@@ -345,7 +345,7 @@ static void intel_cores_init(struct device *cpu)
new->path.apic.apic_id);
#if CONFIG_SMP && CONFIG_MAX_CPUS > 1
/* Start the new cpu */
/* Start the new CPU */
if (!start_cpu(new)) {
/* Record the error in cpu? */
printk(BIOS_ERR, "CPU %u would not start!\n",
@@ -379,7 +379,7 @@ static void model_2065x_init(struct device *cpu)
/* Setup Page Attribute Tables (PAT) */
// TODO set up PAT
/* Enable the local cpu apics */
/* Enable the local CPU apics */
enable_lapic_tpr();
setup_lapic();

8
src/cpu/intel/model_206ax/model_206ax_init.c
View File

@@ -520,7 +520,7 @@ static void intel_cores_init(struct device *cpu)
struct device_path cpu_path;
struct device *new;
/* Build the cpu device path */
/* Build the CPU device path */
cpu_path.type = DEVICE_PATH_APIC;
cpu_path.apic.apic_id =
cpu->path.apic.apic_id + i;
@@ -529,7 +529,7 @@ static void intel_cores_init(struct device *cpu)
if (threads_per_core == 1)
cpu_path.apic.apic_id <<= 1;
/* Allocate the new cpu device structure */
/* Allocate the new CPU device structure */
new = alloc_dev(cpu->bus, &cpu_path);
if (!new)
continue;
@@ -539,7 +539,7 @@ static void intel_cores_init(struct device *cpu)
new->path.apic.apic_id);
#if CONFIG_SMP && CONFIG_MAX_CPUS > 1
/* Start the new cpu */
/* Start the new CPU */
if (!start_cpu(new)) {
/* Record the error in cpu? */
printk(BIOS_ERR, "CPU %u would not start!\n",
@@ -572,7 +572,7 @@ static void model_206ax_init(struct device *cpu)
/* Setup Page Attribute Tables (PAT) */
// TODO set up PAT
/* Enable the local cpu apics */
/* Enable the local CPU apics */
enable_lapic_tpr();
setup_lapic();

2
src/cpu/intel/model_65x/model_65x_init.c
View File

@@ -36,7 +36,7 @@ static void model_65x_init(struct device *dev)
x86_setup_mtrrs();
x86_mtrr_check();
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
};

2
src/cpu/intel/model_67x/model_67x_init.c
View File

@@ -40,7 +40,7 @@ static void model_67x_init(struct device *cpu)
x86_setup_mtrrs();
x86_mtrr_check();
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
}

2
src/cpu/intel/model_68x/model_68x_init.c
View File

@@ -44,7 +44,7 @@ static void model_68x_init(struct device *cpu)
x86_setup_mtrrs();
x86_mtrr_check();
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
}

2
src/cpu/intel/model_69x/model_69x_init.c
View File

@@ -18,7 +18,7 @@ static void model_69x_init(struct device *dev)
/* Update the microcode */
intel_update_microcode_from_cbfs();
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
};

2
src/cpu/intel/model_6bx/model_6bx_init.c
View File

@@ -44,7 +44,7 @@ static void model_6bx_init(struct device *cpu)
x86_setup_mtrrs();
x86_mtrr_check();
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
}

2
src/cpu/intel/model_6dx/model_6dx_init.c
View File

@@ -31,7 +31,7 @@ static void model_6dx_init(struct device *dev)
/* Update the microcode */
intel_update_microcode_from_cbfs();
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
};

4
src/cpu/intel/model_6ex/model_6ex_init.c
View File

@@ -154,7 +154,7 @@ static void model_6ex_init(struct device *cpu)
x86_setup_mtrrs();
x86_mtrr_check();
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
/* Enable virtualization */
@@ -169,7 +169,7 @@ static void model_6ex_init(struct device *cpu)
/* PIC thermal sensor control */
configure_pic_thermal_sensors();
/* Start up my cpu siblings */
/* Start up my CPU siblings */
intel_sibling_init(cpu);
}

4
src/cpu/intel/model_6fx/model_6fx_init.c
View File

@@ -177,7 +177,7 @@ static void model_6fx_init(struct device *cpu)
/* Setup Page Attribute Tables (PAT) */
// TODO set up PAT
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
/* Enable virtualization */
@@ -192,7 +192,7 @@ static void model_6fx_init(struct device *cpu)
/* PIC thermal sensor control */
configure_pic_thermal_sensors();
/* Start up my cpu siblings */
/* Start up my CPU siblings */
intel_sibling_init(cpu);
}

2
src/cpu/intel/model_6xx/model_6xx_init.c
View File

@@ -31,7 +31,7 @@ static void model_6xx_init(struct device *dev)
/* Update the microcode */
intel_update_microcode_from_cbfs();
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
};

2
src/cpu/intel/model_f0x/model_f0x_init.c
View File

@@ -31,7 +31,7 @@ static void model_f0x_init(struct device *dev)
/* Update the microcode */
intel_update_microcode_from_cbfs();
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
};

2
src/cpu/intel/model_f1x/model_f1x_init.c
View File

@@ -31,7 +31,7 @@ static void model_f1x_init(struct device *dev)
/* Update the microcode */
intel_update_microcode_from_cbfs();
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
};

4
src/cpu/intel/model_f2x/model_f2x_init.c
View File

@@ -36,10 +36,10 @@ static void model_f2x_init(struct device *cpu)
intel_update_microcode_from_cbfs();
}
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
/* Start up my cpu siblings */
/* Start up my CPU siblings */
intel_sibling_init(cpu);
};

4
src/cpu/intel/model_f3x/model_f3x_init.c
View File

@@ -36,10 +36,10 @@ static void model_f3x_init(struct device *cpu)
intel_update_microcode_from_cbfs();
}
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
/* Start up my cpu siblings */
/* Start up my CPU siblings */
intel_sibling_init(cpu);
};

4
src/cpu/intel/model_f4x/model_f4x_init.c
View File

@@ -36,10 +36,10 @@ static void model_f4x_init(struct device *cpu)
intel_update_microcode_from_cbfs();
}
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
/* Start up my cpu siblings */
/* Start up my CPU siblings */
intel_sibling_init(cpu);
};