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Remove AMD K8 cpu and northbridge support

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Change-Id: I9c53dfa93bf906334f5c80e4525a1c27153656a3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26673
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Kyösti Mälkki
2018-05-24 00:34:15 +03:00
parent 4979ffc5cb
commit d840eb5719
62 changed files with 2 additions and 20024 deletions
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48
src/lib/generic_sdram.c
View File

@@ -1,48 +0,0 @@
#include <lib.h> /* Prototypes */
/* Setup SDRAM */
#if IS_ENABLED(CONFIG_RAMINIT_SYSINFO)
void sdram_initialize(int controllers, const struct mem_controller *ctrl,
void *sysinfo)
#else
void sdram_initialize(int controllers, const struct mem_controller *ctrl)
#endif
{
int i;
/* Set the registers we can set once to reasonable values */
for (i = 0; i < controllers; i++) {
printk(BIOS_DEBUG, "Ram1.%02x\n", i);
#if IS_ENABLED(CONFIG_RAMINIT_SYSINFO)
sdram_set_registers(ctrl + i, sysinfo);
#else
sdram_set_registers(ctrl + i);
#endif
}
/* Now setup those things we can auto detect */
for (i = 0; i < controllers; i++) {
printk(BIOS_DEBUG, "Ram2.%02x\n", i);
#if IS_ENABLED(CONFIG_RAMINIT_SYSINFO)
sdram_set_spd_registers(ctrl + i, sysinfo);
#else
sdram_set_spd_registers(ctrl + i);
#endif
}
/* Now that everything is setup enable the SDRAM.
* Some chipsets do the work for us while on others
* we need to it by hand.
*/
printk(BIOS_DEBUG, "Ram3\n");
#if IS_ENABLED(CONFIG_RAMINIT_SYSINFO)
sdram_enable(controllers, ctrl, sysinfo);
#else
sdram_enable(controllers, ctrl);
#endif
printk(BIOS_DEBUG, "Ram4\n");
}