security/tpm: Change TPM naming for different layers.

* Rename tlcl* to tss* as tpm software stack layer.
* Fix inconsistent naming.

Change-Id: I206dd6a32dbd303a6d4d987e424407ebf5c518fa
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-on: https://review.coreboot.org/22104
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

src/cpu/intel/haswell/romstage.c

@@ -42,7 +42,7 @@
 #include "northbridge/intel/haswell/raminit.h"
 #include "southbridge/intel/lynxpoint/pch.h"
 #include "southbridge/intel/lynxpoint/me.h"
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 
 static inline void reset_system(void)
 {

src/drivers/i2c/tpm/cr50.c

@@ -39,7 +39,7 @@
 #include <device/i2c_simple.h>
 #include <endian.h>
 #include <timer.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 #include "tpm.h"
 
 #define CR50_MAX_BUFSIZE	63

src/drivers/i2c/tpm/tis.c

@@ -22,7 +22,7 @@
 #include <device/i2c_simple.h>
 #include <endian.h>
 #include <lib.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 #include "tpm.h"
 #include <timer.h>
 

src/drivers/i2c/tpm/tis_atmel.c

@@ -23,7 +23,7 @@
 #include <device/i2c_simple.h>
 #include <endian.h>
 #include <lib.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 #include <timer.h>
 
 #define RECV_TIMEOUT            (1 * 1000)  /* 1 second */

src/drivers/i2c/tpm/tpm.c

@@ -38,7 +38,7 @@
 #include <device/i2c_simple.h>
 #include <endian.h>
 #include <timer.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 #include "tpm.h"
 
 /* max. number of iterations after I2C NAK */

src/drivers/intel/fsp1_1/romstage.c

@@ -36,7 +36,7 @@
 #include <stage_cache.h>
 #include <string.h>
 #include <timestamp.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 asmlinkage void *romstage_main(FSP_INFO_HEADER *fih)

src/drivers/intel/fsp2_0/memory_init.c

@@ -31,7 +31,7 @@
 #include <string.h>
 #include <symbols.h>
 #include <timestamp.h>
-#include <security/tpm/tlcl.h>
+#include <security/tpm/tss.h>
 #include <security/vboot/vboot_common.h>
 #include <vb2_api.h>
 

src/drivers/pc80/tpm/Makefile.inc

@@ -1,8 +1,8 @@
 ifeq ($(CONFIG_ARCH_X86),y)
 
-verstage-$(CONFIG_LPC_TPM) += tpm.c
+verstage-$(CONFIG_LPC_TPM) += tis.c
-romstage-$(CONFIG_LPC_TPM) += tpm.c
+romstage-$(CONFIG_LPC_TPM) += tis.c
-ramstage-$(CONFIG_LPC_TPM) += tpm.c
+ramstage-$(CONFIG_LPC_TPM) += tis.c
 romstage-$(CONFIG_LPC_TPM) += romstage.c
 
 endif

src/drivers/pc80/tpm/romstage.c

@@ -17,7 +17,7 @@
 #include <console/cbmem_console.h>
 #include <console/console.h>
 #include <arch/acpi.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 #include <reset.h>
 
 //#define EXTRA_LOGGING

src/drivers/pc80/tpm/tis.c

@@ -32,7 +32,7 @@
 #include <arch/acpi_device.h>
 #include <device/device.h>
 #include <console/console.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 #include <arch/early_variables.h>
 #include <device/pnp.h>
 #include "chip.h"

src/drivers/spi/tpm/tis.c

@@ -7,7 +7,7 @@
 #include <arch/early_variables.h>
 #include <console/console.h>
 #include <string.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 
 #include "tpm.h"
 

src/drivers/spi/tpm/tpm.c

@@ -23,7 +23,7 @@
 #include <endian.h>
 #include <string.h>
 #include <timer.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 
 #include "tpm.h"
 

src/mainboard/asus/kgpe-d16/romstage.c

@@ -46,7 +46,7 @@
 #include <cpu/amd/family_10h-family_15h/init_cpus.h>
 #include <arch/early_variables.h>
 #include <cbmem.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 
 #include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"

src/mainboard/google/gru/chromeos.c

@@ -17,7 +17,7 @@
 #include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 
 #include "board.h"
 

src/mainboard/google/link/romstage.c

@@ -35,7 +35,7 @@
 #include <arch/cpu.h>
 #include <cpu/x86/msr.h>
 #include <halt.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 #include <cbfs.h>
 
 #include <southbridge/intel/bd82x6x/chip.h>

src/mainboard/google/oak/tpm_tis.c

@@ -14,7 +14,7 @@
  */
 
 #include <gpio.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 
 #include "gpio.h"
 

src/mainboard/google/parrot/romstage.c

@@ -35,7 +35,7 @@
 #include <cpu/x86/msr.h>
 #include <halt.h>
 #include <cbfs.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 #include "ec/compal/ene932/ec.h"
 
 void pch_enable_lpc(void)

src/mainboard/google/stout/romstage.c

@@ -35,7 +35,7 @@
 #include <cpu/x86/msr.h>
 #include <halt.h>
 #include <bootmode.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 #include <cbfs.h>
 #include <ec/quanta/it8518/ec.h>
 #include "ec.h"

src/mainboard/intel/emeraldlake2/romstage.c

@@ -35,7 +35,7 @@
 #include <arch/cpu.h>
 #include <cpu/x86/msr.h>
 #include <halt.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 
 #define SIO_PORT 0x164e
 

src/mainboard/lenovo/x201/romstage.c

@@ -35,7 +35,7 @@
 #include <timestamp.h>
 #include <arch/acpi.h>
 #include <cbmem.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 
 #include "dock.h"
 #include "arch/early_variables.h"

src/mainboard/pcengines/apu2/romstage.c

@@ -33,7 +33,7 @@
 #include <cpu/x86/lapic.h>
 #include <southbridge/amd/pi/hudson/hudson.h>
 #include <Fch/Fch.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 
 #include "gpio_ftns.h"
 

src/mainboard/samsung/lumpy/romstage.c

@@ -28,7 +28,7 @@
 #include <cbmem.h>
 #include <console/console.h>
 #include <bootmode.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
 #include <northbridge/intel/sandybridge/raminit.h>
 #include <northbridge/intel/sandybridge/raminit_native.h>

src/mainboard/samsung/stumpy/romstage.c

@@ -37,7 +37,7 @@
 #include <arch/cpu.h>
 #include <cpu/x86/msr.h>
 #include <halt.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 #if IS_ENABLED(CONFIG_DRIVERS_UART_8250IO)
 #include <superio/smsc/lpc47n207/lpc47n207.h>
 #endif

src/northbridge/intel/sandybridge/romstage.c

@@ -28,7 +28,7 @@
 #include <device/pci_def.h>
 #include <device/device.h>
 #include <halt.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 #include <northbridge/intel/sandybridge/chip.h>
 #include "southbridge/intel/bd82x6x/pch.h"
 #include <southbridge/intel/common/gpio.h>

src/security/tpm/Makefile.inc

@@ -1,12 +1,12 @@
-verstage-$(CONFIG_TPM) += tcg-1.2/tlcl.c
+verstage-$(CONFIG_TPM) += tcg-1.2/tss.c
-verstage-$(CONFIG_TPM2) += tcg-2.0/tpm2_marshaling.c
+verstage-$(CONFIG_TPM2) += tcg-2.0/tss_marshaling.c
-verstage-$(CONFIG_TPM2) += tcg-2.0/tpm2_tlcl.c
+verstage-$(CONFIG_TPM2) += tcg-2.0/tss.c
 
 ifeq ($(CONFIG_VBOOT_SEPARATE_VERSTAGE),y)
-romstage-$(CONFIG_TPM) += tcg-1.2/tlcl.c
+romstage-$(CONFIG_TPM) += tcg-1.2/tss.c
-romstage-$(CONFIG_TPM2) += tcg-2.0/tpm2_marshaling.c
+romstage-$(CONFIG_TPM2) += tcg-2.0/tss_marshaling.c
-romstage-$(CONFIG_TPM2) += tcg-2.0/tpm2_tlcl.c
+romstage-$(CONFIG_TPM2) += tcg-2.0/tss.c
 endif # CONFIG_VBOOT_SEPARATE_VERSTAGE
 
-ramstage-$(CONFIG_TPM2) += tcg-2.0/tpm2_marshaling.c
+ramstage-$(CONFIG_TPM2) += tcg-2.0/tss_marshaling.c
-ramstage-$(CONFIG_TPM2) += tcg-2.0/tpm2_tlcl.c
+ramstage-$(CONFIG_TPM2) += tcg-2.0/tss.c

src/security/tpm/tcg-1.2/tss.c

@@ -17,11 +17,11 @@
 #include <arch/early_variables.h>
 #include <assert.h>
 #include <string.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 #include <vb2_api.h>
-#include "tlcl_internal.h"
+#include "tss_internal.h"
-#include "tlcl_structures.h"
+#include "tss_structures.h"
-#include "../tlcl.h"
+#include "../tss.h"
 
 #ifdef FOR_TEST
 #include <stdio.h>

src/security/tpm/tcg-1.2/tss_internal.h

@@ -3,8 +3,8 @@
  * found in the LICENSE file.
  */
 
-#ifndef TPM_LITE_TLCL_INTERNAL_H_
+#ifndef TCG_TSS_INTERNAL_H_
-#define TPM_LITE_TLCL_INTERNAL_H_
+#define TCG_TSS_INTERNAL_H_
 
 /*
  * These numbers derive from adding the sizes of command fields as shown in the
@@ -62,4 +62,4 @@ static inline void from_tpm_uint16(const uint8_t *buffer, uint16_t *x)
 	*x = (buffer[0] << 8) | buffer[1];
 }
 
-#endif  /* TPM_LITE_TLCL_INTERNAL_H_ */
+#endif  /* TCG_TSS_INTERNAL_H_ */

src/security/tpm/tcg-2.0/tss.c

@@ -10,9 +10,9 @@
 #include <string.h>
 #include <vb2_api.h>
 
-#include "tpm2_tlcl_structures.h"
+#include "tss_structures.h"
-#include "tpm2_marshaling.h"
+#include "tss_marshaling.h"
-#include "../tpm.h"
+#include "../tis.h"
 #include "../antirollback.h"
 
 /*

src/security/tpm/tcg-2.0/tss_marshaling.c

@@ -10,7 +10,7 @@
 #include <stdlib.h>
 #include <string.h>
 
-#include "tpm2_marshaling.h"
+#include "tss_marshaling.h"
 
 static uint16_t tpm_tag CAR_GLOBAL;  /* Depends on the command type. */
 

src/security/tpm/tcg-2.0/tss_marshaling.h

@@ -3,11 +3,11 @@
  * Use of this source code is governed by a BSD-style license that can be
  * found in the LICENSE file.
  */
-#ifndef __SRC_LIB_TPM2_MARSHALING_H
+#ifndef TCG2_TSS_MARSHALING_H_
-#define __SRC_LIB_TPM2_MARSHALING_H
+#define TCG2_TSS_MARSHALING_H_
 
 #include <commonlib/iobuf.h>
-#include "tpm2_tlcl_structures.h"
+#include "tss_structures.h"
 
 /* The below functions are used to serialize/deserialize TPM2 commands. */
 
@@ -43,4 +43,4 @@ int tpm_marshal_command(TPM_CC command, void *tpm_command_body,
  */
 struct tpm2_response *tpm_unmarshal_response(TPM_CC command, struct ibuf *ib);
 
-#endif // __SRC_LIB_TPM2_MARSHALING_H
+#endif // TCG2_TSS_MARSHALING_H_

src/security/tpm/tcg-2.0/tss_structures.h

@@ -4,8 +4,8 @@
  * found in the LICENSE file.
  */
 
-#ifndef __SRC_LIB_TPM2_TLCL_STRUCTURES_H
+#ifndef TCG2_TSS_STRUCTURES_H_
-#define __SRC_LIB_TPM2_TLCL_STRUCTURES_H
+#define TCG2_TSS_STRUCTURES_H_
 
 /*
  * This file includes a subset of definitions of TPM protocol version 2.x
@@ -15,7 +15,7 @@
 #include <compiler.h>
 #include <types.h>
 
-#include "../tlcl.h"
+#include "../tss.h"
 
 /* This should be plenty for what firmware needs. */
 #define TPM_BUFFER_SIZE 256
@@ -370,4 +370,4 @@ struct tpm2_hierarchy_control_cmd {
 	TPMI_YES_NO state;
 };
 
-#endif // __SRC_LIB_TPM2_TLCL_STRUCTURES_H
+#endif // TCG2_TSS_STRUCTURES_H_

src/security/tpm/tis.h

@@ -13,8 +13,8 @@
  * GNU General Public License for more details.
  */
 
-#ifndef TPM_H_
+#ifndef TIS_H_
-#define TPM_H_
+#define TIS_H_
 
 #include <stddef.h>
 #include <stdint.h>
@@ -99,4 +99,4 @@ void init_tpm(int s3resume);
  */
 int tis_plat_irq_status(void);
 
-#endif /* TPM_H_ */
+#endif /* TIS_H_ */

src/security/tpm/tss.h

@@ -9,8 +9,8 @@
  * A low-level library for interfacing to TPM hardware or an emulator.
  */
 
-#ifndef TPM_LITE_TLCL_H_
+#ifndef TSS_H_
-#define TPM_LITE_TLCL_H_
+#define TSS_H_
 #include <stdint.h>
 #include <types.h>
 
@@ -174,4 +174,4 @@ uint32_t tlcl_cr50_enable_nvcommits(void);
 uint32_t tlcl_cr50_enable_update(uint16_t timeout_ms,
 				 uint8_t *num_restored_headers);
 
-#endif  /* TPM_LITE_TLCL_H_ */
+#endif  /* TSS_H_ */

src/security/tpm/tss_error_messages.h

@@ -9,8 +9,8 @@
  * Version 1.2 Level 2 Revision 103 26 October 2006 Draft.
  */
 
-#ifndef TPM_ERROR_MESSAGES_H
+#ifndef TSS_ERROR_MESSAGES_H_
-#define TPM_ERROR_MESSAGES_H
+#define TSS_ERROR_MESSAGES_H_
 
 #define TPM_E_BASE 0x0
 #define TPM_E_NON_FATAL 0x800
@@ -252,4 +252,4 @@ because the ordinal required resources that have not been tested"},
 time-out period"},
 };
 
-#endif				/* TPM_ERROR_MESSAGES_H */
+#endif				/* TSS_ERROR_MESSAGES_H_ */

src/security/vboot/secdata_mock.c

@@ -34,7 +34,7 @@
 
 #include <security/tpm/antirollback.h>
 #include <stdlib.h>
-#include <security/tpm/tlcl.h>
+#include <security/tpm/tss.h>
 #include <vb2_api.h>
 
 uint32_t tpm_extend_pcr(struct vb2_context *ctx, int pcr,

src/security/vboot/secdata_tpm.c

@@ -35,7 +35,7 @@
 #include <security/tpm/antirollback.h>
 #include <stdlib.h>
 #include <string.h>
-#include <security/tpm/tlcl.h>
+#include <security/tpm/tss.h>
 #include <vb2_api.h>
 #include <console/console.h>
 

src/soc/intel/baytrail/romstage/romstage.c

@@ -30,7 +30,7 @@
 #include <stage_cache.h>
 #include <string.h>
 #include <timestamp.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include <soc/gpio.h>
 #include <soc/iomap.h>

src/soc/intel/braswell/romstage/romstage.c

@@ -43,7 +43,7 @@
 #include <soc/romstage.h>
 #include <soc/smm.h>
 #include <soc/spi.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 
 void program_base_addresses(void)
 {

src/soc/intel/broadwell/romstage/romstage.c

@@ -25,7 +25,7 @@
 #include <cbmem.h>
 #include <cpu/x86/mtrr.h>
 #include <elog.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 #include <program_loading.h>
 #include <romstage_handoff.h>
 #include <stage_cache.h>

src/soc/intel/common/tpm_tis.c

@@ -14,7 +14,7 @@
  */
 
 #include <arch/acpi.h>
-#include <security/tpm/tpm.h>
+#include <security/tpm/tis.h>
 
 int tis_plat_irq_status(void)
 {

src/vendorcode/google/chromeos/cr50_enable_update.c

@@ -18,7 +18,7 @@
 #include <ec/google/chromeec/ec.h>
 #include <elog.h>
 #include <halt.h>
-#include <security/tpm/tlcl.h>
+#include <security/tpm/tss.h>
 #include <vb2_api.h>
 #include <security/vboot/vboot_common.h>
 

src/vendorcode/google/chromeos/tpm2.c

@@ -15,7 +15,7 @@
 
 #include <bootstate.h>
 #include <console/console.h>
-#include <security/tpm/tlcl.h>
+#include <security/tpm/tss.h>
 #include <vb2_api.h>
 
 static void disable_platform_hierarchy(void *unused)