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amd/cimx: fix sb(8|9)00 NULL type redefine

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It is inappropriate for chipset code to be redefining
types -- especially NULL to a non-pointer type. There's
only one non-straight forward change. A condition
being checked was '!ptr_type == NULL' (0 as int). That
check is actually 'ptr_type != NULL'.

Change-Id: Iab5733e5a573baba6fec94e0c955ba4fad72c836
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/5088
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Aaron Durbin
2014-01-30 22:20:01 -06:00
committed by Aaron Durbin
parent 6ecdb68562
commit d907a3402e
14 changed files with 28 additions and 36 deletions
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6
src/southbridge/amd/cimx/sb800/SBPLATFORM.h
View File

@@ -24,11 +24,7 @@
#ifndef _AMD_SBPLATFORM_H_
#define _AMD_SBPLATFORM_H_
//#include "cbtypes.h"
#ifdef NULL
#undef NULL
#endif
#define NULL 0
#include <stddef.h>
typedef unsigned long long PLACEHOLDER;

6
src/southbridge/amd/cimx/sb900/SbPlatform.h
View File

@@ -24,11 +24,7 @@
#ifndef _AMD_SBPLATFORM_H_
#define _AMD_SBPLATFORM_H_
//#include "cbtypes.h"
#ifdef NULL
#undef NULL
#endif
#define NULL 0
#include <stddef.h>
typedef unsigned long long PLACEHOLDER;

6
src/southbridge/amd/cimx/sb900/cfg.c
View File

@@ -178,7 +178,7 @@ void sb900_cimx_config(AMDSBCFG *sb_config)
// sb_config->HpetMsiDis = 0; // Field Retired
// sb_config->ResetCpuOnSyncFlood = 0; // Field Retired
// sb_config->PcibAutoClkCtr = 0; // Field Retired
sb_config->OEMPROGTBL.OemProgrammingTablePtr = NULL; // Board Level
sb_config->OEMPROGTBL.OemProgrammingTablePtr = (uintptr_t)NULL; // Board Level
sb_config->PORTCONFIG[0].PortCfg.PortPresent = SB_GPP_PORT0; // Board Level
sb_config->PORTCONFIG[0].PortCfg.PortDetected = 0; // CIMx Internal Used
sb_config->PORTCONFIG[0].PortCfg.PortIsGen2 = 0; // CIMx Internal Used
@@ -213,7 +213,7 @@ void sb900_cimx_config(AMDSBCFG *sb_config)
sb_config->GppHardwareDowngrade = INCHIP_GPP_HARDWARE_DOWNGRADE;// Internal Option
sb_config->GppToggleReset = INCHIP_GPP_TOGGLE_RESET; // External Option
sb_config->sdbEnable = 0; // CIMx Internal Used
sb_config->TempMMIO = NULL; // CIMx Internal Used
sb_config->TempMMIO = (typeof(sb_config->TempMMIO))NULL; // CIMx Internal Used
// sb_config->GecPhyStatus = INCHIP_GEC_PHY_STATUS; // Field Retired
sb_config->SBGecPwr = INCHIP_GEC_POWER_POLICY; // Internal Option
sb_config->SBGecDebugBus = INCHIP_GEC_DEBUGBUS; // Internal Option
@@ -296,7 +296,7 @@ void SbPowerOnInit_Config(AMDSBCFG *sb_config)
sb_config->SATAMODE.SataMode.SataClkMode = SATA_CLK_RESERVED; // Internal Option
sb_config->NbSbGen2 = NB_SB_GEN2; // External Option
sb_config->SataInternal100Spread = INCHIP_SATA_INTERNAL_100_SPREAD; // External Option
sb_config->OEMPROGTBL.OemProgrammingTablePtr = NULL; // Board Level
sb_config->OEMPROGTBL.OemProgrammingTablePtr = (uintptr_t)NULL; // Board Level
sb_config->sdbEnable = 0; // CIMx Internal Used
sb_config->Cg2Pll = INCHIP_CG2_PLL; // Internal Option