soc/intel/quark: Add legacy SPI flash controller driver

Add SPI driver code for the legacy SPI flash controller.  Enable erase
and write support allowing coreboot to save non-volatile data into
the SPI flash.

TEST=Build and run on Galileo Gen2.

Change-Id: I8f38c955d7c42a1e58728c728d0cecc36556de5c
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/20231
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>

src/soc/intel/quark/Makefile.inc

@@ -58,6 +58,8 @@ ramstage-y += northcluster.c
 ramstage-y += reg_access.c
 ramstage-$(CONFIG_PLATFORM_USES_FSP2_0) += reset.c
 ramstage-y += sd.c
+ramstage-y += spi.c
+ramstage-y += spi_debug.c
 ramstage-$(CONFIG_STORAGE_TEST) += storage_test.c
 ramstage-y += tsc_freq.c
 ramstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart_common.c