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bolt: Set GPIO29 as input in S0, output+high in S3/S5

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This resolves WiFi issues after suspend/resume.

It needs related SPI descriptor soft strap change to
enable SLP_WLAN as a GPIO instead of owned by the ME.

Change-Id: I03f4458d1e52a913770d391061baa6cfa41e8558
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/170577
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit cf1fe0524ad4793c8c422dc3fed3007b7fc96038)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6533
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
This commit is contained in:
Duncan Laurie
2013-09-25 14:05:31 -07:00
committed by Patrick Georgi
parent cff6667eba
commit d988b612c7
2 changed files with 25 additions and 1 deletions
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2
src/mainboard/google/bolt/gpio.h
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@@ -52,7 +52,7 @@ const struct pch_lp_gpio_map mainboard_gpio_map[] = {
LP_GPIO_UNUSED, /* 26: UNUSED */
LP_GPIO_UNUSED, /* 27: UNUSED */
LP_GPIO_UNUSED, /* 28: UNUSED */
LP_GPIO_NATIVE, /* 29: NATIVE: WLAN_OFF_L */
LP_GPIO_INPUT, /* 29: NATIVE: WLAN_OFF_L */
LP_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSWARN_L */
LP_GPIO_NATIVE, /* 31: NATIVE: ACOK_BUF */
LP_GPIO_NATIVE, /* 32: NATIVE: LPC_CLKRUN_L */