diff --git a/src/mainboard/ocp/monolake/romstage.c b/src/mainboard/ocp/monolake/romstage.c
index f3ec7e32b8..8625868428 100644
--- a/src/mainboard/ocp/monolake/romstage.c
+++ b/src/mainboard/ocp/monolake/romstage.c
@@ -17,6 +17,7 @@
 #include <stddef.h>
 #include <soc/romstage.h>
 #include <drivers/intel/fsp1_0/fsp_util.h>
+#include <drivers/vpd/vpd.h>
 #include <cpu/x86/msr.h>
 #include <cf9_reset.h>
 #include <console/console.h>
@@ -24,6 +25,9 @@
 #include <soc/pci_devs.h>
 #include <soc/lpc.h>
 
+/* Define the strings for UPD variables that could be customized */
+#define FSP_VAR_HYPERTHREADING "HyperThreading"
+
 /**
  * /brief mainboard call for setup that needs to be done before fsp init
  *
@@ -57,9 +61,26 @@ void late_mainboard_romstage_entry(void)
 			   0x0c0ca1);
 }
 
+/*
+ * This function sets up global variable to store VPD binary blob info,
+ * and use settings in the binary blob to configure UPD.
+ */
+static void board_configure_upd(UPD_DATA_REGION *UpdData)
+{
+	u8 val;
+
+	if (vpd_get_bool(FSP_VAR_HYPERTHREADING, VPD_RW, &val))
+		UpdData->HyperThreading = val;
+}
+
 /**
- * /brief customize fsp parameters here if needed
+ * /brief customize fsp parameters, use data stored in VPD binary blob
+ * to configure FSP UPD variables.
  */
 void romstage_fsp_rt_buffer_callback(FSP_INIT_RT_BUFFER *FspRtBuffer)
 {
+	UPD_DATA_REGION *UpdData = FspRtBuffer->Common.UpdDataRgnPtr;
+
+	if (CONFIG(VPD))
+		board_configure_upd(UpdData);
 }