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mb/system76/adl,rpl: Enable PchHdaSdiEnable

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Commit 4a58d14506 ("soc/intel/alderlake: Hook up UPD PchHdaSdiEnable")
and commit 2d48238618 ("soc/intel/alderlake: Set PchHdaSdiEnable for
Alder Lake") hooked up this UPD in devicetree, causing the FSP default
to be overridden (now disabled by default).

Enable SDI to fix the following error:

    [DEBUG]  PCI: 00:00:1f.3 init
    [DEBUG]  azalia_audio: base = 0xbfbcc000
    [DEBUG]  azalia_audio: No codec!
    [DEBUG]  PCI: 00:00:1f.3 init finished in 5 msecs

Tested on gaze17-3050: Speaker output works again.

Change-Id: Iceac1faec939ce9eea68c335929f96ec5f2bd132
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80754
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Jeremy Soller <jeremy@system76.com>
This commit is contained in:
Tim Crawford
2024-02-27 09:41:43 -07:00
committed by Felix Held
parent 8b495c2706
commit daa4fb2ca2
2 changed files with 2 additions and 0 deletions
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1
src/mainboard/system76/adl/devicetree.cb
View File

@@ -82,6 +82,7 @@ chip soc/intel/alderlake
device ref p2sb on end device ref p2sb on end
device ref hda on device ref hda on
register "pch_hda_audio_link_hda_enable" = "1" register "pch_hda_audio_link_hda_enable" = "1"
register "pch_hda_sdi_enable[0]" = "1"
register "pch_hda_idisp_codec_enable" = "1" register "pch_hda_idisp_codec_enable" = "1"
register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ" register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ"
register "pch_hda_idisp_link_tmode" = "HDA_TMODE_8T" register "pch_hda_idisp_link_tmode" = "HDA_TMODE_8T"

1
src/mainboard/system76/rpl/devicetree.cb
View File

@@ -66,6 +66,7 @@ chip soc/intel/alderlake
device ref p2sb on end device ref p2sb on end
device ref hda on device ref hda on
register "pch_hda_audio_link_hda_enable" = "1" register "pch_hda_audio_link_hda_enable" = "1"
register "pch_hda_sdi_enable[0]" = "1"
register "pch_hda_idisp_codec_enable" = "1" register "pch_hda_idisp_codec_enable" = "1"
register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ" register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ"
register "pch_hda_idisp_link_tmode" = "HDA_TMODE_8T" register "pch_hda_idisp_link_tmode" = "HDA_TMODE_8T"