arch/riscv: Remove ram probing
Previously RAM probing was necessary for our QEMU-RISCV target in order to find the available amount of memory. Now we get the memory from the devicetree propagated by QEMU, so there is no reason to keep it anymore. Tested: Start QEMU-RISCV and cause an exception to make sure the trap handler still works. Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com> Change-Id: I9b1e0dc78fc2a66d6085fe99a71245ff46f8e63c Reviewed-on: https://review.coreboot.org/c/coreboot/+/83873 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -96,7 +96,6 @@ endif #CONFIG_ARCH_BOOTBLOCK_RISCV
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ifeq ($(CONFIG_ARCH_ROMSTAGE_RISCV),y)
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romstage-$(CONFIG_SEPARATE_ROMSTAGE) += romstage.S
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romstage-y += ramdetect.c
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# Build the romstage
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@ -120,7 +119,6 @@ ifeq ($(CONFIG_ARCH_RAMSTAGE_RISCV),y)
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ramstage-y =
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ramstage-y += ramstage.S
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ramstage-y += ramdetect.c
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ramstage-y += tables.c
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ramstage-y += payload.c
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ramstage-y += fit_payload.c
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@ -26,7 +26,7 @@ static inline void exception_init(void)
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}
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void redirect_trap(void);
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void default_trap_handler(struct trapframe *tf);
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void trap_handler(struct trapframe *tf);
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void handle_supervisor_call(struct trapframe *tf);
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#endif
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@ -1,61 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <arch/exception.h>
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#include <types.h>
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#include <console/console.h>
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#include <device/mmio.h>
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#include <ramdetect.h>
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#include <arch/smp/spinlock.h>
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#include <vm.h>
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static enum {
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ABORT_CHECKER_NOT_TRIGGERED,
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ABORT_CHECKER_TRIGGERED,
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} abort_state = ABORT_CHECKER_NOT_TRIGGERED;
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extern void (*trap_handler)(struct trapframe *tf);
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static int get_instruction_len(uintptr_t addr)
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{
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uint16_t ins = read16p(addr);
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/*
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* 16-bit or 32-bit instructions supported
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*/
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if ((ins & 0x3) != 3) {
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return 2;
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} else if ((ins & 0x1f) != 0x1f) {
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return 4;
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}
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die("Not a 16bit or 32bit instruction 0x%x\n", ins);
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}
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static void ramcheck_trap_handler(struct trapframe *tf)
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{
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abort_state = ABORT_CHECKER_TRIGGERED;
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/*
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* skip read instruction.
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*/
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int insn_size = get_instruction_len(tf->epc);
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write_csr(mepc, read_csr(mepc) + insn_size);
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}
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int probe_mb(const uintptr_t dram_start, const uintptr_t size)
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{
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uintptr_t addr = dram_start + (size * MiB) - sizeof(uint32_t);
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void *ptr = (void *)addr;
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abort_state = ABORT_CHECKER_NOT_TRIGGERED;
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trap_handler = ramcheck_trap_handler;
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barrier();
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read32(ptr);
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trap_handler = default_trap_handler;
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barrier();
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printk(BIOS_DEBUG, "%lx is %s DRAM\n", dram_start + size * MiB,
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abort_state == ABORT_CHECKER_NOT_TRIGGERED ? "" : "not");
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return abort_state == ABORT_CHECKER_NOT_TRIGGERED;
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}
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@ -109,9 +109,7 @@ static void interrupt_handler(struct trapframe *tf)
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}
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}
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void (*trap_handler)(struct trapframe *tf) = default_trap_handler;
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void default_trap_handler(struct trapframe *tf)
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void trap_handler(struct trapframe *tf)
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{
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if (tf->cause & 0x8000000000000000ULL) {
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interrupt_handler(tf);
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@ -120,8 +120,7 @@ trap_entry:
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mv a0,sp # put trapframe as first argument
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LOAD t0, trap_handler
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jalr t0
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jal trap_handler
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trap_return:
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restore_regs
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@ -69,13 +69,6 @@ config RISCV_WORKING_HARTID
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int
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default 0
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config DRAM_SIZE_MB
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int
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default 16383
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help
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Qemu maps MMIO at ALIGN_UP(top_of_mem, 16 * GiB)
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To avoid confusing the dram probing algorithm, avoid large dram sizes (16G - 1m)
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config OPENSBI_PLATFORM
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string
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default "generic"
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@ -1,5 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <assert.h>
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#include <cbmem.h>
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#include <symbols.h>
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#include <ramdetect.h>
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@ -11,9 +12,7 @@ uintptr_t cbmem_top_chipset(void)
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uint64_t top;
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top = fdt_get_memory_top((void *)HLS()->fdt);
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if (top)
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return MIN(top, (uint64_t)4 * GiB - 1);
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ASSERT_MSG(top, "Failed reading memory range from FDT");
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size_t dram_mb_detected = probe_ramsize((uintptr_t)_dram, CONFIG_DRAM_SIZE_MB);
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return (uintptr_t)_dram + dram_mb_detected * MiB;
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return MIN(top, (uint64_t)4 * GiB - 1);
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}
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