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google/fizz: Enable cr50 over i2c

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BUG=b:62456589, b:35775024
BRANCH=None
TEST=Reboot and ensure verstage doesn't have any TPM errors
CQ-DEPEND=CL:530185

Change-Id: Icfde0f62bd058d960fcb0c6fc67f9d8f6b9462f5
Signed-off-by: Shelley Chen <shchen@chromium.org>
Reviewed-on: https://review.coreboot.org/20133
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Shelley Chen
2017-06-09 12:56:08 -07:00
committed by Martin Roth
parent 1b5eda0233
commit db287aad25
4 changed files with 60 additions and 7 deletions
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10
src/mainboard/google/fizz/mainboard.c
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@@ -17,6 +17,7 @@
#include <console/console.h>
#include <device/device.h>
#include <ec/ec.h>
#include <soc/pci_devs.h>
#include <vendorcode/google/chromeos/chromeos.h>
static void mainboard_init(device_t dev)
@@ -26,8 +27,17 @@ static void mainboard_init(device_t dev)
static void mainboard_enable(device_t dev)
{
device_t tpm;
dev->ops->init = mainboard_init;
dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator;
/* Disable unused interface for TPM. */
if (!IS_ENABLED(CONFIG_FIZZ_USE_I2C_TPM)) {
tpm = PCH_DEV_I2C1;
if (tpm)
tpm->enabled = 0;
}
}
struct chip_operations mainboard_ops = {