- Bump the LinuxBIOS major version

- Rename chip_config chip_operations throughout the tree
- Fix Config.lb on most of the Opteron Ports
- Fix the amd 8000 chipset support for setting the subsystem vendor and device ids
- Add detection of devices that are on the motherboard (i.e. In Config.lb)
- Baby step in getting the resource limit handling correct, Ignore fixed resources
- Only call enable_childrens_resources on devices we know will have children
  For some busses like i2c it is non-sense and we don't want it.
- Set the resource limits for pnp devices resources.
- Improve the resource size detection for pnp devices.
- Added a configuration register to amd8111_ide.c so we can enable/disable individual ide channels
- Added a header file to hold the prototype of isa_dma_init
- Fixed most of the superio chips so the should work now, the via superio pci device is the exception.
- The code compiles and runs so it is time for me to go to bed.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

util/newconfig/config.g

@@ -807,6 +807,7 @@ class partobj:
 				file.write("\t.bus = &dev_root.link[0],\n")
 				file.write("\t.path = { .type = DEVICE_PATH_ROOT },\n")
 				file.write("\t.enabled = 1,\n\t.links = 1,\n")
+				file.write("\t.on_mainboard = 1,\n")
 				file.write("\t.link = {\n\t\t[0] = {\n")
 				file.write("\t\t\t.dev=&dev_root,\n\t\t\t.link = 0,\n")
 				file.write("\t\t\t.children = &%s,\n" % self.firstchilddevice().instance_name)
@@ -830,6 +831,7 @@ class partobj:
 			self.firstparentdevicelink()))
 		file.write("\t.path = {%s},\n" % self.path)
 		file.write("\t.enabled = %d,\n" % self.enabled)
+		file.write("\t.on_mainboard = 1,\n")
 		if (self.resources):
 			file.write("\t.resources = %d,\n" % self.resources)
 			file.write("\t.resource = {%s\n\t },\n" % self.resource)