northbridge/amd/pi/00730F01: enable PARALLEL_MP

Disable LEGACY_SMP_INIT to enable PARALLEL_MP.
Also remove a large amount of APIC code that is now unnecessary.

TEST=Boot on PC Engines apu3

Boot time reduced from 1.707 seconds to 1.620 seconds average across
5 coldboots.

Inspired by CB:59693

Change-Id: Ib49e7d3f5956ac7831664d50db5f233b70aa54db
Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59808
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

src/cpu/amd/pi/00730F01/model_16_init.c

@@ -23,21 +23,6 @@ static void model_16_init(struct device *dev)
 	msr_t msr;
 	u32 siblings;
 
-	/*
-	 * All cores are initialized sequentially, so the solution for APs will be created
-	 * before they start.
-	 */
-	x86_setup_mtrrs_with_detect();
-	/*
-	 * Enable ROM caching on BSP we just lost when creating MTRR solution, for faster
-	 * execution of e.g. AmdInitLate
-	 */
-	if (boot_cpu()) {
-		mtrr_use_temp_range(OPTIMAL_CACHE_ROM_BASE, OPTIMAL_CACHE_ROM_SIZE,
-				    MTRR_TYPE_WRPROT);
-	}
-	x86_mtrr_check();
-
 	/* zero the machine check error status registers */
 	mca_clear_status();