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Documentation/soc/intel/icelake: Fix references between documents

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Change-Id: Ifbdab15b1183998712f92d1f2f5340d2ad1451dc
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/30157
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
This commit is contained in:
Jonathan Neuschäfer
2018-12-11 15:16:29 +01:00
committed by Patrick Georgi
parent 84eb41d74c
commit dca74c16a3
3 changed files with 6 additions and 6 deletions
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Documentation/soc/intel/icelake/iceLake_coreboot_development.md
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@@ -17,12 +17,12 @@ Like any other Intel SoC, Ice Lake coreboot development is also based on "Intel
2. Additionally provides Firmware code support for Intel Reference Platform (RVP), known as Ice lake RVP with same SoC.
```eval_rst
:doc:`../../../mainboard/intel/icelake_rvp.md`
:doc:`../../../mainboard/intel/icelake_rvp`
```
3. OEMs to design based on reference platform and make use of mainboard sample code. Dragonegg is Ice Lake based mainboard developed by Google
```eval_rst
:doc:`../../../mainboard/google/dragonegg.md`
:doc:`../../../mainboard/google/dragonegg`
```
### Summary: