soc/amd/common/psp: Revert AMD_SOC_SEPARATE_EFS_SECTION

Reverting commit 1e25fd426a ("soc/amd/common/block/psp: introduce
AMD_SOC_SEPARATE_EFS_SECTION").

A better solution was used in commit c17330c1dd ("mb/amd/chausie: Add
EC blob into CBFS"), and this is no longer necessary.

TEST: Boot chausie

Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: I27a8622a1f0d871690b181a79adca225a20996ea
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65492
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

src/soc/amd/common/block/psp/Kconfig

@@ -29,14 +29,6 @@ config SOC_AMD_PSP_SELECTABLE_SMU_FW
 	  fanned set of blobs.  Ask your AMD representative whether your APU
 	  is considered fanless.
 
-config AMD_SOC_SEPARATE_EFS_SECTION
-	bool
-	help
-	  Use separate EFS FMAP section instead of putting EFS into CBFS. The
-	  FMAP section must begin exactly at the location the EFS needs to be
-	  placed in the flash. This option can be used to place the EFS right
-	  after the 128kByte EC firmware at the beginning of the flash.
-
 config SOC_AMD_COMMON_BLOCK_PSP_FUSE_SPL
 	bool
 	default n

src/soc/amd/common/block/psp/Makefile.inc

@@ -8,11 +8,6 @@ smm-y += psp_smm.c
 bootblock-y += psp_efs.c
 verstage-y += psp_efs.c
 
-ifeq ($(CONFIG_AMD_SOC_SEPARATE_EFS_SECTION),y)
-bootblock-y += efs_fmap_check.c
-$(call src-to-obj,bootblock,$(dir)/efs_fmap_check.c) : $(obj)/fmap_config.h
-endif # CONFIG_AMD_SOC_SEPARATE_EFS_SECTION
-
 endif # CONFIG_SOC_AMD_COMMON_BLOCK_PSP
 
 ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN1),y)

src/soc/amd/common/block/psp/efs_fmap_check.c

@@ -1,9 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <amdblocks/psp_efs.h>
-#include <assert.h>
-#include <fmap_config.h>
-#include <soc/iomap.h>
-
-_Static_assert(FMAP_SECTION_EFS_START == (FLASH_BASE_ADDR + EFS_OFFSET),
-	"FMAP EFS Offset does not match EFS Offset - check your config");