acpi: Add support for writing UART device descriptors
This change adds support for generating the device descriptor that corresponds to the UARTSerialBusV2() ACPI macro. The resulting ACPI code for ACPI_UART_RAW_DEVICE(115200, 64) is: UartSerialBusV2 (0x0001C200, DataBitsEight, StopBitsOne, 0x00, LittleEndian, ParityTypeNone, FlowControlNone, 0x0040, 0x0040, "\\_SB.PCI0.UAR2", 0x00, ResourceConsumer, , Exclusive) Change-Id: I671ce2a499d74717d8677528c46ab3fbc1d7faf5 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41792 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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Furquan Shaikh
parent
84fac41d35
commit
dccef0da0c
@@ -323,10 +323,14 @@ void acpi_device_write_gpio(const struct acpi_gpio *gpio);
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#define ACPI_SERIAL_BUS_TYPE_I2C 1
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#define ACPI_SERIAL_BUS_TYPE_SPI 2
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#define ACPI_SERIAL_BUS_TYPE_UART 3
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#define ACPI_I2C_SERIAL_BUS_REVISION_ID 1 /* TODO: upgrade to 2 */
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#define ACPI_I2C_TYPE_SPECIFIC_REVISION_ID 1
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#define ACPI_SPI_SERIAL_BUS_REVISION_ID 1
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#define ACPI_SPI_TYPE_SPECIFIC_REVISION_ID 1
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#define ACPI_UART_SERIAL_BUS_REVISION_ID 1
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#define ACPI_UART_TYPE_SPECIFIC_REVISION_ID 1
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/*
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* ACPI I2C Bus
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@@ -372,6 +376,91 @@ struct acpi_spi {
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/* Write SPI Bus descriptor to SSDT AML output */
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void acpi_device_write_spi(const struct acpi_spi *spi);
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/*
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* ACPI UART Bus
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*/
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enum acpi_uart_data_bits {
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ACPI_UART_DATA_BITS_5,
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ACPI_UART_DATA_BITS_6,
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ACPI_UART_DATA_BITS_7,
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ACPI_UART_DATA_BITS_8,
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ACPI_UART_DATA_BITS_9
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};
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enum acpi_uart_stop_bits {
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ACPI_UART_STOP_BITS_0,
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ACPI_UART_STOP_BITS_1,
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ACPI_UART_STOP_BITS_1_5,
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ACPI_UART_STOP_BITS_2
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};
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enum acpi_uart_lines {
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ACPI_UART_LINE_DTD = BIT(2), /* Data Carrier Detect */
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ACPI_UART_LINE_RI = BIT(3), /* Ring Indicator */
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ACPI_UART_LINE_DSR = BIT(4), /* Data Set Ready */
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ACPI_UART_LINE_DTR = BIT(5), /* Data Terminal Ready */
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ACPI_UART_LINE_CTS = BIT(6), /* Clear to Send */
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ACPI_UART_LINE_RTS = BIT(7) /* Request to Send */
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};
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enum acpi_uart_endian {
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ACPI_UART_ENDIAN_LITTLE,
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ACPI_UART_ENDIAN_BIG
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};
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enum acpi_uart_parity {
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ACPI_UART_PARITY_NONE,
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ACPI_UART_PARITY_EVEN,
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ACPI_UART_PARITY_ODD,
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ACPI_UART_PARITY_MARK,
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ACPI_UART_PARITY_SPACE
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};
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enum acpi_uart_flow_control {
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ACPI_UART_FLOW_NONE,
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ACPI_UART_FLOW_HARDWARE,
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ACPI_UART_FLOW_SOFTWARE
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};
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struct acpi_uart {
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/* Initial Baud Rate in bits per second */
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uint32_t initial_baud_rate;
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/* Number of bits of data in a packet (value between 5-9) */
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enum acpi_uart_data_bits data_bits;
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/* Number of bits to signal end of packet */
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enum acpi_uart_stop_bits stop_bits;
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/* Bitmask indicating presence or absence of particular line */
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unsigned int lines_in_use;
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/* Specify if the device expects big or little endian format */
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enum acpi_uart_endian endian;
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/* Specify the type of parity bits included after the data in a packet */
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enum acpi_uart_parity parity;
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/* Specify the flow control method */
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enum acpi_uart_flow_control flow_control;
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/* Upper limit in bytes of the buffer sizes for this device */
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uint16_t rx_fifo_bytes;
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uint16_t tx_fifo_bytes;
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/* Set true if UART is shared, false if it is exclusive for one device */
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bool shared;
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/* Reference to UART controller */
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const char *resource;
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};
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#define ACPI_UART_RAW_DEVICE(baud_rate, fifo_bytes) { \
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.initial_baud_rate = (baud_rate), \
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.data_bits = ACPI_UART_DATA_BITS_8, \
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.stop_bits = ACPI_UART_STOP_BITS_1, \
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.endian = ACPI_UART_ENDIAN_LITTLE, \
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.parity = ACPI_UART_PARITY_NONE, \
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.flow_control = ACPI_UART_FLOW_NONE, \
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.rx_fifo_bytes = (fifo_bytes), \
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.tx_fifo_bytes = (fifo_bytes), \
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.shared = false }
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/* Write UARTSerialBusV2() descriptor to SSDT AML output */
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void acpi_device_write_uart(const struct acpi_uart *uart);
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/* GPIO/timing information for the power on/off sequences */
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struct acpi_power_res_params {
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/* GPIO used to take device out of reset or to put it into reset. */
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