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soc/intel/gma: Move DDI-A 4-lane config to common code

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Change-Id: I0572dbbfb61e5e0129fe6a3a1b5894145d74fd0d
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40728
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Nico Huber
2020-04-26 20:37:32 +02:00
parent dd59762729
commit dd274e2971
6 changed files with 18 additions and 37 deletions
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21
src/soc/intel/skylake/graphics.c
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@@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi.h>
#include <commonlib/helpers.h>
#include <console/console.h>
#include <device/mmio.h>
@@ -16,7 +15,7 @@ uintptr_t fsp_soc_get_igd_bar(void)
return graphics_get_memory_base();
}
static void graphics_setup_panel(struct device *dev)
void graphics_soc_init(struct device *dev)
{
struct soc_intel_skylake_config *conf = config_of(dev);
struct resource *mmio_res;
@@ -76,24 +75,6 @@ static void graphics_setup_panel(struct device *dev)
}
}
void graphics_soc_init(struct device *dev)
{
u32 ddi_buf_ctl;
graphics_setup_panel(dev);
/*
* Enable DDI-A (eDP) 4-lane operation if the link is not up yet.
* This will allow the kernel to use 4-lane eDP links properly
* if the VBIOS or GOP driver does not execute.
*/
ddi_buf_ctl = graphics_gtt_read(DDI_BUF_CTL_A);
if (!acpi_is_wakeup_s3() && !(ddi_buf_ctl & DDI_BUF_CTL_ENABLE)) {
ddi_buf_ctl |= DDI_A_4_LANES;
graphics_gtt_write(DDI_BUF_CTL_A, ddi_buf_ctl);
}
}
const struct i915_gpu_controller_info *
intel_igd_get_controller_info(const struct device *device)
{