mainboard/google/hatch: Set GPP_C7 as the wake pin for the NIC on Puff

BUG=b:148252157
BRANCH=none
TEST=Put a puff in s0ix, send a WoL magic packet.

Change-Id: I4a08a2f5505d00909c9301315fcf72f687141f91
Signed-off-by: Sam McNally <sammc@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38553
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
This commit is contained in:
Sam McNally
2020-01-24 13:53:17 +11:00
committed by Patrick Georgi
parent f74b6e351c
commit dd80b5c7a1

View File

@ -270,6 +270,7 @@ chip soc/intel/cannonlake
device pci 1c.0 on
chip drivers/net
register "customized_leds" = "0x05af"
register "wake" = "GPE0_DW1_07" # GPP_C7
device pci 00.0 on end
end
end # FSP requires func0 be enabled.