nb/amd/pi/00730F01: assign IOMMU ops in chipset devicetree
Since the IOMMU is always function 2 of device 0 on bus 0, the device operations can be statically assigned in the devicetree and there's no need to bind the IOMMU device operations to the PCI device during runtime via a list of PCI IDs. TEST=PC Engines APU2 still boots and doesn't show any new problems Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I84e949500ee86e0fcb2d15791502f5e3e7127703 Reviewed-on: https://review.coreboot.org/c/coreboot/+/79105 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
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		| @@ -10,7 +10,9 @@ chip northbridge/amd/pi/00730F01 | ||||
| 		device pci 0.0 alias gnb			on | ||||
| 			ops amd_pi_northbridge_ops | ||||
| 		end | ||||
| 		device pci 0.2 alias iommu			off end | ||||
| 		device pci 0.2 alias iommu			off | ||||
| 			ops amd_pi_iommu_ops | ||||
| 		end | ||||
| 		device pci 1.0 alias gfx			off end | ||||
| 		device pci 1.1 alias gfx_hda			off end | ||||
| 		device pci 2.0					on  end # Dummy device function, do not disable | ||||
|   | ||||
| @@ -21,15 +21,9 @@ static void iommu_read_resources(struct device *dev) | ||||
| 	res->flags = IORESOURCE_MEM; | ||||
| } | ||||
|  | ||||
| static struct device_operations iommu_ops = { | ||||
| struct device_operations amd_pi_iommu_ops = { | ||||
| 	.read_resources = iommu_read_resources, | ||||
| 	.set_resources = pci_dev_set_resources, | ||||
| 	.enable_resources = pci_dev_enable_resources, | ||||
| 	.ops_pci = &pci_dev_ops_pci, | ||||
| }; | ||||
|  | ||||
| static const struct pci_driver iommu_driver __pci_driver = { | ||||
| 	.ops = &iommu_ops, | ||||
| 	.vendor = PCI_VID_AMD, | ||||
| 	.device = PCI_DID_AMD_16H_MODEL_303F_NB_IOMMU, | ||||
| }; | ||||
|   | ||||
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