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src/northbridge: Drop unneeded empty lines

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Change-Id: I5f3118f0f855160ed49adc543b6169fccd7520ee
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44593
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Elyes HAOUAS
2020-08-19 21:41:06 +02:00
committed by Michael Niewöhner
parent 7aa3372ce2
commit dddd1cc691
25 changed files with 0 additions and 44 deletions
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5
src/northbridge/intel/gm45/raminit.c
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@@ -216,7 +216,6 @@ void enter_raminit_or_reset(void)
pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa2, reg8 | (1 << 7));
}
/* For a detected DIMM, test the value of an SPD byte to
match the expected value after masking some bits. */
static int test_dimm(sysinfo_t *const sysinfo,
@@ -281,7 +280,6 @@ static void verify_ddr3(sysinfo_t *const sysinfo, int mask)
}
}
typedef struct {
int dimm_mask;
struct {
@@ -1710,7 +1708,6 @@ void raminit(sysinfo_t *const sysinfo, const int s3resume)
/* Check for bad warm boot. */
reset_on_bad_warmboot();
/***** From now on, program according to collected infos: *****/
/* Program DRAM type. */
@@ -1772,10 +1769,8 @@ void raminit(sysinfo_t *const sysinfo, const int s3resume)
pci_and_config8(PCI_DEV(0, 0, 0), 0xf0, ~(1 << 2));
/* Take a breath (the reader). */
/* Perform ZQ calibration for DDR3. */
if (sysinfo->spd_type == DDR3)
ddr3_calibrate_zq();