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soc/amd: remove special GPIO_2 override soc_gpio_hook

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This override was added to have the SCI mapping configured if GPIO was
used as WAKE_L pin. This however didn't set up the SCI level and trigger
information, so it likely never worked as intended.

Change-Id: I44661f05c8f517ece88714c625603579731d174b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43049
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Kyösti Mälkki
2020-07-03 00:24:28 +03:00
committed by Felix Held
parent f8e440cadf
commit de7262f82c
5 changed files with 0 additions and 36 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
src/soc/amd/cezanne/gpio.c
View File

@ -1,10 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/gpio_banks.h>
#include <amdblocks/acpimmio.h>
#include <amdblocks/smi.h>
#include <soc/gpio.h>
#include <soc/smi.h>
#include <types.h>
/* see the IOMUX function table for the mapping from GPIO number to GEVENT number */
@ -40,10 +37,3 @@ void soc_get_gpio_event_table(const struct soc_amd_event **table, size_t *items)
*table = gpio_event_table;
*items = ARRAY_SIZE(gpio_event_table);
}
void soc_gpio_hook(uint8_t gpio, uint8_t mux)
{
/* Always program Gevent when WAKE_L_AGPIO2 is configured as WAKE_L */
if ((gpio == 2) && !(mux & AMD_GPIO_MUX_MASK))
soc_route_sci(GPIO_2_EVENT);
}

4
src/soc/amd/common/block/gpio_banks/gpio.c
View File

@ -179,8 +179,6 @@ uint16_t gpio_acpi_pin(gpio_t gpio)
return gpio;
}
__weak void soc_gpio_hook(uint8_t gpio, uint8_t mux) {}
static void set_single_gpio(const struct soc_amd_gpio *g,
struct sci_trigger_regs *sci_trigger_cfg)
{
@ -193,8 +191,6 @@ static void set_single_gpio(const struct soc_amd_gpio *g,
iomux_write8(g->gpio, g->function & AMD_GPIO_MUX_MASK);
iomux_read8(g->gpio); /* Flush posted write */
soc_gpio_hook(g->gpio, g->function);
gpio_setbits32(g->gpio, PAD_CFG_MASK, g->control);
/* Clear interrupt and wake status (write 1-to-clear bits) */
gpio_or32(g->gpio, GPIO_INT_STATUS | GPIO_WAKE_STATUS);

2
src/soc/amd/common/block/include/amdblocks/gpio_banks.h
View File

@ -85,7 +85,5 @@ void program_gpios(const struct soc_amd_gpio *gpio_list_ptr, size_t size);
int gpio_interrupt_status(gpio_t gpio);
/* Implemented by soc, provides table of available GPIO mapping to Gevents */
void soc_get_gpio_event_table(const struct soc_amd_event **table, size_t *items);
/* May be implemented by soc to handle special cases */
void soc_gpio_hook(uint8_t gpio, uint8_t mux);
#endif /* AMD_BLOCK_GPIO_BANKS_H */

10
src/soc/amd/picasso/gpio.c
View File

@ -1,10 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/gpio_banks.h>
#include <amdblocks/acpimmio.h>
#include <amdblocks/smi.h>
#include <soc/gpio.h>
#include <soc/smi.h>
#include <types.h>
static const struct soc_amd_event gpio_event_table[] = {
@ -39,10 +36,3 @@ void soc_get_gpio_event_table(const struct soc_amd_event **table, size_t *items)
*table = gpio_event_table;
*items = ARRAY_SIZE(gpio_event_table);
}
void soc_gpio_hook(uint8_t gpio, uint8_t mux)
{
/* Always program Gevent when WAKE_L_AGPIO2 is configured as WAKE_L */
if ((gpio == 2) && !(mux & AMD_GPIO_MUX_MASK))
soc_route_sci(GPIO_2_EVENT);
}

10
src/soc/amd/stoneyridge/gpio.c
View File

@ -1,10 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/gpio_banks.h>
#include <amdblocks/acpimmio.h>
#include <amdblocks/smi.h>
#include <soc/gpio.h>
#include <soc/smi.h>
#include <types.h>
static const struct soc_amd_event gpio_event_table[] = {
@ -39,10 +36,3 @@ void soc_get_gpio_event_table(const struct soc_amd_event **table, size_t *items)
*table = gpio_event_table;
*items = ARRAY_SIZE(gpio_event_table);
}
void soc_gpio_hook(uint8_t gpio, uint8_t mux)
{
/* Always program Gevent when WAKE_L_AGPIO2 is configured as WAKE_L */
if ((gpio == 2) && !(mux & AMD_GPIO_MUX_MASK))
soc_route_sci(GPIO_2_EVENT);
}