vc/intel/fsp/fsp2_0/ptl: Add placeholder FSP headers to compile

Details:
- Skeleton files to compile google/fatcat mainboard.

BUG=b:348678529
TEST=Build verified on with using PTL SOC and google/fatcat mainboard.

Change-Id: I4c069ba64f487259ce746dc52296618d91209602
Signed-off-by: Saurabh Mishra <mishra.saurabh@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83732
Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ravishankar Sarawadi <ravishankar.sarawadi@intel.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Jamie Ryu <jamie.m.ryu@intel.com>
This commit is contained in:
Saurabh Mishra 2024-08-01 17:09:59 +05:30 committed by Felix Held
parent d4253a3d56
commit de8b77c384
6 changed files with 481 additions and 0 deletions

View File

@ -0,0 +1,61 @@
/** @file
Header file for Firmware Version Information
@copyright
Copyright (c) 2015 - 2024, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License which accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
@par Specification Reference:
System Management BIOS (SMBIOS) Reference Specification v3.0.0 dated 2015-Feb-12
http://www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.0.0.pdf
**/
#ifndef __FIRMWARE_VERSION_INFO_H__
#define __FIRMWARE_VERSION_INFO_H__
#include <IndustryStandard/SmBios.h>
#define INTEL_FIRMWARE_VERSION_INFO_GROUP_NAME "Firmware Version Info"
#define INTEL_FVI_SMBIOS_TYPE 0xDD
#pragma pack(1)
///
/// Firmware Version Structure
///
typedef struct {
UINT8 MajorVersion;
UINT8 MinorVersion;
UINT8 Revision;
UINT16 BuildNumber;
} INTEL_FIRMWARE_VERSION;
///
/// Firmware Version Info (FVI) Structure
///
typedef struct {
SMBIOS_TABLE_STRING ComponentName; ///< String Index of Component Name
SMBIOS_TABLE_STRING VersionString; ///< String Index of Version String
INTEL_FIRMWARE_VERSION Version; ///< Firmware version
} INTEL_FIRMWARE_VERSION_INFO;
///
/// SMBIOS OEM Type Intel Firmware Version Info (FVI) Structure
///
typedef struct {
SMBIOS_STRUCTURE Header; ///< SMBIOS structure header
UINT8 Count; ///< Number of FVI entries in this structure
INTEL_FIRMWARE_VERSION_INFO Fvi[1]; ///< FVI structure(s)
} SMBIOS_TABLE_TYPE_OEM_INTEL_FVI;
#pragma pack()
#endif

View File

@ -0,0 +1,82 @@
/** @file
Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _FSP_PRODUCER_DATA_HEADER_H_
#define _FSP_PRODUCER_DATA_HEADER_H_
#include <Guid/FspHeaderFile.h>
#define BUILD_TIME_STAMP_SIZE 12
//
// FSP Header Data structure from FspHeader driver.
//
#pragma pack(1)
///
/// FSP Producer Data Subtype - 1
///
typedef struct {
///
/// Byte 0x00: Length of this FSP producer data type record.
///
UINT16 Length;
///
/// Byte 0x02: FSP producer data type.
///
UINT8 Type;
///
/// Byte 0x03: Revision of this FSP producer data type.
///
UINT8 Revision;
///
/// Byte 0x04: 4 byte field of RC version which is used to build this FSP image.
///
UINT32 RcVersion;
///
/// Byte 0x08: Represents the build time stamp "YYYYMMDDHHMM".
///
UINT8 BuildTimeStamp[BUILD_TIME_STAMP_SIZE];
} FSP_PRODUCER_DATA_TYPE1;
///
/// FSP Producer Data Subtype - 2
///
typedef struct {
///
/// Byte 0x00: Length of this FSP producer data type record.
///
UINT16 Length;
///
/// Byte 0x02: FSP producer data type.
///
UINT8 Type;
///
/// Byte 0x03: Revision of this FSP producer data type.
///
UINT8 Revision;
///
/// Byte 0x04: 4 byte field of Mrc version which is used to build this FSP image.
///
UINT8 MrcVersion [4];
} FSP_PRODUCER_DATA_TYPE2;
typedef struct {
FSP_INFO_HEADER FspInfoHeader;
FSP_INFO_EXTENDED_HEADER FspInfoExtendedHeader;
FSP_PRODUCER_DATA_TYPE1 FspProduceDataType1;
FSP_PRODUCER_DATA_TYPE2 FspProduceDataType2;
FSP_PATCH_TABLE FspPatchTable;
} FSP_PRODUCER_DATA_TABLES;
#pragma pack()
#endif // _FSP_PRODUCER_DATA_HEADER_H

View File

@ -0,0 +1,48 @@
/** @file
Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or
other materials provided with the distribution.
* Neither the name of Intel Corporation nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
THE POSSIBILITY OF SUCH DAMAGE.
This file is automatically generated. Please do NOT modify !!!
**/
#ifndef __FSPUPD_H__
#define __FSPUPD_H__
#include <FspEas.h>
#pragma pack(1)
#define FSPT_UPD_SIGNATURE 0x545F4450554C5450 /* 'PTLUPD_T' */
#define FSPM_UPD_SIGNATURE 0x4D5F4450554C5450 /* 'PTLUPD_M' */
#define FSPS_UPD_SIGNATURE 0x535F4450554C5450 /* 'PTLUPD_S' */
#pragma pack()
#endif

View File

@ -0,0 +1,76 @@
/** @file
Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or
other materials provided with the distribution.
* Neither the name of Intel Corporation nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
THE POSSIBILITY OF SUCH DAMAGE.
This file is automatically generated. Please do NOT modify !!!
**/
#ifndef __FSPMUPD_H__
#define __FSPMUPD_H__
#include <FspUpd.h>
#pragma pack(1)
#include <MemInfoHob.h>
/** FSP M Configuration
**/
typedef struct {
/* Placeholder for FSP_M_CONFIG UPDs */
} FSP_M_CONFIG;
/** Fsp M UPD Configuration
**/
typedef struct {
/** Offset 0x0000
**/
FSP_UPD_HEADER FspUpdHeader;
/** Offset 0x0020
**/
FSPM_ARCH2_UPD FspmArchUpd;
/** Offset 0x0060
**/
FSP_M_CONFIG FspmConfig;
/** Offset 0x0060
**/
UINT8 UnusedUpdSpace4[6];
/** Offset 0x0066
**/
UINT16 UpdTerminator;
} FSPM_UPD;
#pragma pack()
#endif

View File

@ -0,0 +1,94 @@
/** @file
Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or
other materials provided with the distribution.
* Neither the name of Intel Corporation nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
THE POSSIBILITY OF SUCH DAMAGE.
This file is automatically generated. Please do NOT modify !!!
**/
#ifndef __FSPSUPD_H__
#define __FSPSUPD_H__
#include <FspUpd.h>
#pragma pack(1)
///
/// Refer to the definition of PCH_INT_PIN
///
typedef enum {
SiPchNoInt, ///< No Interrupt Pin
SiPchIntA,
SiPchIntB,
SiPchIntC,
SiPchIntD
} SI_PCH_INT_PIN;
///
/// The PCH_DEVICE_INTERRUPT_CONFIG block describes interrupt pin, IRQ and interrupt mode for PCH device.
///
typedef struct {
UINT8 Device; ///< Device number
UINT8 Function; ///< Device function
UINT8 IntX; ///< Interrupt pin: INTA-INTD (see SI_PCH_INT_PIN)
UINT8 Irq; ///< IRQ to be set for device.
} SI_PCH_DEVICE_INTERRUPT_CONFIG;
/** FSP S Configuration
**/
typedef struct {
/* Placeholder for FSP_S_CONFIG UPDs */
} FSP_S_CONFIG;
/** Fsp S UPD Configuration
**/
typedef struct {
/** Offset 0x0000
**/
FSP_UPD_HEADER FspUpdHeader;
/** Offset 0x0020
**/
FSPS_ARCH2_UPD FspsArchUpd;
/** Offset 0x0040
**/
FSP_S_CONFIG FspsConfig;
/** Offset 0x0040
**/
UINT8 UnusedUpdSpace1[6];
/** Offset 0x0046
**/
UINT16 UpdTerminator;
} FSPS_UPD;
#pragma pack()
#endif

View File

@ -0,0 +1,120 @@
/** @file
This file contains definitions required for creation of
Memory S3 Save data, Memory Info data and Memory Platform
data hobs.
@copyright
Copyright (c) 1999 - 2024, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
@par Specification Reference:
**/
#ifndef _MEM_INFO_HOB_H_
#define _MEM_INFO_HOB_H_
#pragma pack (push, 1)
#if !defined(_PEI_HOB_H_) && !defined(__PI_HOB_H__)
#ifndef __HOB__H__
typedef struct _EFI_HOB_GENERIC_HEADER {
UINT16 HobType;
UINT16 HobLength;
UINT32 Reserved;
} EFI_HOB_GENERIC_HEADER;
typedef struct _EFI_HOB_GUID_TYPE {
EFI_HOB_GENERIC_HEADER Header;
EFI_GUID Name;
///
/// Guid specific data goes here
///
} EFI_HOB_GUID_TYPE;
#endif
#endif
//
// MRC version description.
//
typedef struct {
UINT8 Major; ///< Major version number
UINT8 Minor; ///< Minor version number
UINT8 Rev; ///< Revision number
UINT8 Build; ///< Build number
} SiMrcVersion;
//
// Matches MrcChannelSts enum in MRC
//
#ifndef CHANNEL_NOT_PRESENT
#define CHANNEL_NOT_PRESENT 0 // There is no channel present on the controller.
#endif
#ifndef CHANNEL_DISABLED
#define CHANNEL_DISABLED 1 // There is a channel present but it is disabled.
#endif
#ifndef CHANNEL_PRESENT
#define CHANNEL_PRESENT 2 // There is a channel present and it is enabled.
#endif
//
// Matches MrcDimmSts enum in MRC
//
#ifndef DIMM_ENABLED
#define DIMM_ENABLED 0 // DIMM/rank Pair is enabled, presence will be detected.
#endif
#ifndef DIMM_DISABLED
#define DIMM_DISABLED 1 // DIMM/rank Pair is disabled, regardless of presence.
#endif
#ifndef DIMM_PRESENT
#define DIMM_PRESENT 2 // There is a DIMM present in the slot/rank pair and it will be used.
#endif
#ifndef DIMM_NOT_PRESENT
#define DIMM_NOT_PRESENT 3 // There is no DIMM present in the slot/rank pair.
#endif
//
// Matches MrcBootMode enum in MRC
//
#ifndef __MRC_BOOT_MODE__
#define __MRC_BOOT_MODE__ //The below values are originated from MrcCommonTypes.h
#ifndef INT32_MAX
#define INT32_MAX (0x7FFFFFFF)
#endif //INT32_MAX
typedef enum {
bmCold, ///< Cold boot
bmWarm, ///< Warm boot
bmS3, ///< S3 resume
bmFast, ///< Fast boot
MrcBootModeMax, ///< MRC_BOOT_MODE enumeration maximum value.
MrcBootModeDelim = INT32_MAX ///< This value ensures the enum size is consistent on both sides of the PPI.
} MRC_BOOT_MODE;
#endif //__MRC_BOOT_MODE__
/**
Memory Info Data Hob
**/
typedef struct {
} MEMORY_INFO_DATA_HOB;
/**
Memory Platform Data Hob
**/
typedef struct {
} MEMORY_PLATFORM_DATA;
typedef struct {
EFI_HOB_GUID_TYPE EfiHobGuidType;
MEMORY_PLATFORM_DATA Data;
UINT8 *Buffer;
} MEMORY_PLATFORM_DATA_HOB;
#pragma pack (pop)
#endif // _MEM_INFO_HOB_H_