sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

intelmetool: Do small cosmetic changes

Browse Source 
Refining some of the code indentations and cosmetics to
build upon and import some in-review changes.

Change-Id: I0038a146bd899f150518c4832258a42792abaabb
Signed-off-by: Maximilian Schander <maxschander@googlemail.com>
Reviewed-on: https://review.coreboot.org/22216
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
This commit is contained in:
Maximilian Schander
2017-10-28 18:33:07 +02:00
committed by Martin Roth
parent 1812311645
commit df5b83fe2b
5 changed files with 89 additions and 75 deletions
Download Patch File Download Diff File Expand all files Collapse all files

26
util/intelmetool/me.c
View File

@@ -53,7 +53,8 @@ static void mei_dump(void *ptr, int dword, int offset, const char *type)
switch (offset) {
case MEI_H_CSR:
case MEI_ME_CSR_HA:
/* csr = ptr;
/*
csr = ptr;
if (!csr) {
printf("%-9s[%02x] : ", type, offset);
printf("ERROR: 0x%08x\n", dword);
@@ -61,11 +62,13 @@ static void mei_dump(void *ptr, int dword, int offset, const char *type)
}
printf("%-9s[%02x] : ", type, offset);
printf("depth=%u read=%02u write=%02u ready=%u "
"reset=%u intgen=%u intstatus=%u intenable=%u\n", csr->buffer_depth,
csr->buffer_read_ptr, csr->buffer_write_ptr,
csr->ready, csr->reset, csr->interrupt_generate,
csr->interrupt_status, csr->interrupt_enable);
*/ break;
"reset=%u intgen=%u intstatus=%u intenable=%u\n",
csr->buffer_depth, csr->buffer_read_ptr,
csr->buffer_write_ptr, csr->ready, csr->reset,
csr->interrupt_generate, csr->interrupt_status,
csr->interrupt_enable);
*/
break;
case MEI_ME_CB_RW:
case MEI_H_CB_WW:
printf("%-9s[%02x] : ", type, offset);
@@ -463,12 +466,10 @@ int mkhi_get_fwcaps(void)
print_cap("Small business technology ", fwcaps.cap.caps_sku.small_business);
print_cap("Level III manageability ", fwcaps.cap.caps_sku.l3manageability);
print_cap("IntelR Anti-Theft (AT) ", fwcaps.cap.caps_sku.intel_at);
print_cap("IntelR Capability Licensing Service (CLS) ",
fwcaps.cap.caps_sku.intel_cls);
print_cap("IntelR Power Sharing Technology (MPC) ",
fwcaps.cap.caps_sku.intel_mpc);
print_cap("IntelR Capability Licensing Service (CLS) ", fwcaps.cap.caps_sku.intel_cls);
print_cap("IntelR Power Sharing Technology (MPC) ", fwcaps.cap.caps_sku.intel_mpc);
print_cap("ICC Over Clocking ", fwcaps.cap.caps_sku.icc_over_clocking);
print_cap("Protected Audio Video Path (PAVP) ", fwcaps.cap.caps_sku.pavp);
print_cap("Protected Audio Video Path (PAVP) ", fwcaps.cap.caps_sku.pavp);
print_cap("IPV6 ", fwcaps.cap.caps_sku.ipv6);
print_cap("KVM Remote Control (KVM) ", fwcaps.cap.caps_sku.kvm);
print_cap("Outbreak Containment Heuristic (OCH) ", fwcaps.cap.caps_sku.och);
@@ -580,7 +581,8 @@ uint32_t intel_mei_setup(struct pci_dev *dev)
mei_base_address = dev->base_addr[0] & ~0xf;
pagerounded = mei_base_address & ~0xfff;
mei_mmap = map_physical(pagerounded, 0x2000) + mei_base_address - pagerounded;
mei_mmap = map_physical(pagerounded, 0x2000);
mei_mmap += mei_base_address - pagerounded;
if (mei_mmap == NULL) {
printf("Could not map ME setup memory\n");
return 1;