soc/intel/cannonlake: Add FSP UPD to unlock GPIO pads in devicetree

FSP has a UPD to unlock all GPIO pads. This parameter is disabled by
default. Add a chip parameter so that GPIO pads can be unlocked on mainboard
level in devicetree and therefore this feature can be used if needed.

BUG=b:128686027

Change-Id: Iad9e8a209dc3f8ca0c994e8c1da329918409a1d4
Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32110
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>

src/soc/intel/cannonlake/chip.h

@@ -407,6 +407,9 @@ struct soc_intel_cannonlake_config {
 	uint8_t DdiPortCDdc;
 	uint8_t DdiPortDDdc;
 	uint8_t DdiPortFDdc;
+
+	/* Unlock all GPIO Pads */
+	uint8_t PchUnlockGpioPads;
 };
 
 typedef struct soc_intel_cannonlake_config config_t;

src/soc/intel/cannonlake/fsp_params.c

@@ -340,6 +340,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
 
 	/* Set TccActivationOffset */
 	tconfig->TccActivationOffset = config->tcc_offset;
+
+	/* Unlock all GPIO pads */
+	tconfig->PchUnlockGpioPads = config->PchUnlockGpioPads;
 }
 
 /* Mainboard GPIO Configuration */