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stage_cache: Add resume_from_stage_cache()

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Factor out the condition when an attempt to load
stage from cache can be tried.

Change-Id: I936f07bed6fc82f46118d217f1fd233e2e041405
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50000
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Kyösti Mälkki
2021-01-09 13:30:57 +02:00
parent cdaddde067
commit e0165fbc94
6 changed files with 19 additions and 35 deletions
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23
src/drivers/intel/fsp1_1/ramstage.c
View File

@@ -143,21 +143,6 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)
soc_after_silicon_init();
}
static void fsp_cache_save(struct prog *fsp)
{
if (CONFIG(NO_STAGE_CACHE))
return;
printk(BIOS_DEBUG, "FSP: Saving binary in cache\n");
if (prog_entry(fsp) == NULL) {
printk(BIOS_ERR, "ERROR: No FSP to save in cache.\n");
return;
}
stage_cache_add(STAGE_REFCODE, fsp);
}
static int fsp_find_and_relocate(struct prog *fsp)
{
if (prog_locate(fsp)) {
@@ -176,14 +161,14 @@ static int fsp_find_and_relocate(struct prog *fsp)
static void fsp_load(void)
{
struct prog fsp = PROG_INIT(PROG_REFCODE, "fsp.bin");
int is_s3_wakeup = acpi_is_wakeup_s3();
if (is_s3_wakeup && !CONFIG(NO_STAGE_CACHE)) {
printk(BIOS_DEBUG, "FSP: Loading binary from cache\n");
if (resume_from_stage_cache()) {
stage_cache_load_stage(STAGE_REFCODE, &fsp);
} else {
fsp_find_and_relocate(&fsp);
fsp_cache_save(&fsp);
if (prog_entry(&fsp))
stage_cache_add(STAGE_REFCODE, &fsp);
}
/* FSP_INFO_HEADER is set as the program entry. */

2
src/drivers/intel/fsp2_0/silicon_init.c
View File

@@ -205,7 +205,7 @@ void fsps_load(bool s3wake)
if (load_done)
return;
if (s3wake && !CONFIG(NO_STAGE_CACHE)) {
if (resume_from_stage_cache()) {
printk(BIOS_DEBUG, "Loading FSPS from stage_cache\n");
stage_cache_load_stage(STAGE_REFCODE, fsps);
if (fsp_validate_component(&fsps_hdr, prog_rdev(fsps)) != CB_SUCCESS)