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AMD S3: Change the hardcoded data size to macros.

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Change-Id: Ieefc4213a6dee9c399826b1daa98bbf4bc10d881
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: zbao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/2303
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Zheng Bao
2013-02-10 21:10:52 +08:00
committed by Patrick Georgi
parent e7c76b475c
commit e07e253bc8
2 changed files with 8 additions and 4 deletions
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4
src/cpu/amd/agesa/s3_resume.c
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@@ -283,9 +283,9 @@ u32 OemAgesaSaveS3Info(S3_DATA_TYPE S3DataType, u32 DataSize, void *Data)
spi_claim_bus(flash->spi);
if (S3DataType == S3DataTypeNonVolatile) {
flash->erase(flash, S3_DATA_NONVOLATILE_POS, 0x1000);
flash->erase(flash, S3_DATA_NONVOLATILE_POS, S3_DATA_NONVOLATILE_SIZE);
} else {
flash->erase(flash, S3_DATA_VOLATILE_POS, 0x6000);
flash->erase(flash, S3_DATA_VOLATILE_POS, S3_DATA_VOLATILE_SIZE);
}
nvram_pos = 0;

8
src/cpu/amd/agesa/s3_resume.h
View File

@@ -20,9 +20,13 @@
#ifndef S3_RESUME_H
#define S3_RESUME_H
#define S3_DATA_NONVOLATILE_POS (CONFIG_S3_VOLATILE_POS + 0x7000)
/* The size needs to be 4k aligned, which is the sector size of most flashes. */
#define S3_DATA_VOLATILE_SIZE 0x6000
#define S3_DATA_MTRR_SIZE 0x1000
#define S3_DATA_NONVOLATILE_SIZE 0x1000
#define S3_DATA_VOLATILE_POS CONFIG_S3_VOLATILE_POS
#define S3_DATA_MTRR_POS (CONFIG_S3_VOLATILE_POS + 0x6000)
#define S3_DATA_MTRR_POS (CONFIG_S3_VOLATILE_POS + S3_DATA_VOLATILE_SIZE)
#define S3_DATA_NONVOLATILE_POS (CONFIG_S3_VOLATILE_POS + S3_DATA_VOLATILE_SIZE + S3_DATA_MTRR_SIZE)
typedef enum {
S3DataTypeNonVolatile=0, ///< NonVolatile Data Type