All these boards already had the CACHE_AS_RAM option in their individual
configs. I just moved it the the CPU that they all use. Signed-off-by: Warren Turkal <wt@penguintechs.org> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5871 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
committed by
Stefan Reinauer
parent
768d8ea098
commit
e0afe735a0
@@ -10,7 +10,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
|
||||
select HAVE_PIRQ_TABLE
|
||||
select PIRQ_ROUTE
|
||||
select UDELAY_TSC
|
||||
select CACHE_AS_RAM
|
||||
# Standard chip is a 512 KB FWH. Replacing it with a 1 MB
|
||||
# SST 49LF008A is possible.
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
|
Reference in New Issue
Block a user