Add UCB RISCV support for architecture, soc, and emulation mainboard..
Works in the RISCV version of QEMU. Note that the lzmadecode is so unclean that it needs a lot of work. A cleanup is in progress. We decided in Prague to do this as one thing, because it forms a nice case study of the bare minimum you need to add to get a new architecture going in qemu. Change-Id: If5af15c3a70733d219973e0d032746f8ab027e4d Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/7584 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
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@ -2,7 +2,7 @@ menu "Console"
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config BOOTBLOCK_CONSOLE
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bool "Enable early (bootblock) console output."
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depends on ARCH_ARM
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depends on ARCH_ARM || ARCH_RISCV
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default n
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help
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Use console during the bootblock if supported
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