FSP platform microcode: Update to remove Kconfig variable
Move the Kconfig variable into a .h file - this does not need to be in Kconfig. Change-Id: I1db20790ddb32e0eb082503c6c60cbbefa818bb9 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/7646 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
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@@ -58,12 +58,6 @@ config CPU_MICROCODE_CBFS_LOC
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depends on SUPPORT_CPU_UCODE_IN_CBFS
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default 0xfff70000
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config CPU_MICROCODE_CBFS_LEN
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hex
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depends on SUPPORT_CPU_UCODE_IN_CBFS
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default 0xC000 if CPU_INTEL_FSP_MODEL_306AX
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default 0x2800 if CPU_INTEL_FSP_MODEL_206AX
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config MICROCODE_INCLUDE_PATH
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string "Location of the intel microcode patches"
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default "../intel/cpu/ivybridge/microcode" if CPU_INTEL_FSP_MODEL_306AX
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@@ -6,6 +6,7 @@ ramstage-y += acpi.c
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smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
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cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c
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CPPFLAGS_romstage += -I$(src)/cpu/intel/fsp_model_206ax
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ifneq ($(CONFIG_MICROCODE_INCLUDE_PATH),)
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ifneq ($(wildcard $(shell readlink -f "$(top)/$(CONFIG_MICROCODE_INCLUDE_PATH)")),)
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@@ -19,12 +19,12 @@
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*/
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#if IS_ENABLED(CONFIG_CPU_INTEL_FSP_MODEL_206AX)
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/* Size is 0x2800 - Update in Kconfigs when any included file changes*/
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/* Size is 0x2800 - Update in microcode_size.h when any included file changes*/
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#include <microcode-m12206a7_00000029.h>
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#endif
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#if IS_ENABLED(CONFIG_CPU_INTEL_FSP_MODEL_306AX)
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/* Size is 0xC000 - Update in Kconfigs when any included file changes*/
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/* Size is 0xC000 - Update in microcode_size.h when any included file changes*/
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#include <microcode-m12306a2_00000008.h>
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#include <microcode-m12306a4_00000007.h>
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#include <microcode-m12306a5_00000007.h>
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7
src/cpu/intel/fsp_model_206ax/microcode_size.h
Normal file
7
src/cpu/intel/fsp_model_206ax/microcode_size.h
Normal file
@@ -0,0 +1,7 @@
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/* Maximum size of the area that the FSP will search for the correct microcode */
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#if IS_ENABLED(CONFIG_CPU_INTEL_FSP_MODEL_306AX)
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#define MICROCODE_REGION_LENGTH 0xC000
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#elif IS_ENABLED(CONFIG_CPU_INTEL_FSP_MODEL_206AX)
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#define MICROCODE_REGION_LENGTH 0x2800
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#endif
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@@ -62,12 +62,6 @@ config CPU_MICROCODE_CBFS_LOC
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depends on SUPPORT_CPU_UCODE_IN_CBFS
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default 0xfff60040
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config CPU_MICROCODE_CBFS_LEN
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hex
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depends on SUPPORT_CPU_UCODE_IN_CBFS
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default 0x14400 if FSP_MODEL_406DX_A1
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default 0x14800 if FSP_MODEL_406DX_B0
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config MICROCODE_INCLUDE_PATH
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string "Location of the intel microcode patches"
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default "../intel/cpu/rangeley/microcode"
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@@ -23,6 +23,7 @@ subdirs-y += ../../x86/name
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ramstage-y += acpi.c
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cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c
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CPPFLAGS_romstage += -I$(src)/cpu/intel/fsp_model_406dx
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ifneq ($(CONFIG_MICROCODE_INCLUDE_PATH),)
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ifneq ($(wildcard $(shell readlink -f "$(top)/$(CONFIG_MICROCODE_INCLUDE_PATH)")),)
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@@ -20,10 +20,10 @@
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unsigned microcode[] = {
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#if IS_ENABLED(CONFIG_FSP_MODEL_406DX_A1)
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/* Size is 0x14400 */
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/* Size is 0x14400 - update in microcode_size.h when the file changes */
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#include <microcode-m01406d000e.h>
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#elif IS_ENABLED(CONFIG_FSP_MODEL_406DX_B0)
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/* Size is 0x14800 */
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/* Size is 0x14800 - update in microcode_size.h when the file changes */
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#include <microcode-m01406d811d.h>
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#endif
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};
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7
src/cpu/intel/fsp_model_406dx/microcode_size.h
Normal file
7
src/cpu/intel/fsp_model_406dx/microcode_size.h
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@@ -0,0 +1,7 @@
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/* Maximum size of the area that the FSP will search for the correct microcode */
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#if IS_ENABLED(CONFIG_FSP_MODEL_406DX_A1)
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#define MICROCODE_REGION_LENGTH 0x14400
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#elif IS_ENABLED(CONFIG_FSP_MODEL_406DX_B0)
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#define MICROCODE_REGION_LENGTH 0x14800
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#endif
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