Remove AMD special case for LAPIC based udelay()

- Optionally override FSB clock detection in generic
  LAPIC code with constant value.
- Override on AMD Model fxx, 10xxx, agesa CPUs with 200MHz
- compile LAPIC code for romstage, too
- Remove #include ".../apic_timer.c" in AMD based mainboards
- Remove custom udelay implementation from intel northbridges' romstages

Future work:
- remove the compile time special case
  (requires some cpuid based switching)
- drop northbridge udelay implementations (i945, i5000) if
  not required anymore (eg. can SMM use the LAPIC timer?)

Change-Id: I25bacaa2163f5e96ab7f3eaf1994ab6899eff054
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1618
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Patrick Georgi
2012-11-20 11:53:47 +01:00
committed by Stefan Reinauer
parent bdc1816b23
commit e135ac5a7e
77 changed files with 38 additions and 211 deletions

View File

@ -20,7 +20,9 @@
#include <stdint.h>
#include <delay.h>
#include <arch/io.h>
#include <arch/cpu.h>
#include <cpu/x86/car.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/lapic.h>
@ -28,7 +30,15 @@
* memory init.
*/
static u32 timer_fsb = 0;
#if CONFIG_UDELAY_LAPIC_FIXED_FSB
static const u32 timer_fsb = CONFIG_UDELAY_LAPIC_FIXED_FSB;
static int set_timer_fsb(void)
{
return 0;
}
#else
static u32 timer_fsb CAR_GLOBAL = 0;
static int set_timer_fsb(void)
{
@ -60,6 +70,7 @@ static int set_timer_fsb(void)
return 0;
}
#endif
void init_timer(void)
{