Remove AMD special case for LAPIC based udelay()

- Optionally override FSB clock detection in generic
  LAPIC code with constant value.
- Override on AMD Model fxx, 10xxx, agesa CPUs with 200MHz
- compile LAPIC code for romstage, too
- Remove #include ".../apic_timer.c" in AMD based mainboards
- Remove custom udelay implementation from intel northbridges' romstages

Future work:
- remove the compile time special case
  (requires some cpuid based switching)
- drop northbridge udelay implementations (i945, i5000) if
  not required anymore (eg. can SMM use the LAPIC timer?)

Change-Id: I25bacaa2163f5e96ab7f3eaf1994ab6899eff054
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1618
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

src/northbridge/intel/i945/Makefile.inc

@@ -21,7 +21,6 @@ ramstage-y += northbridge.c
 ramstage-y += gma.c
 ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c
 
-romstage-y += udelay.c
 romstage-y += raminit.c
 romstage-y += early_init.c
 romstage-y += errata.c