mb/hp: Move compaq_elite_8300_usdt into snb_ivb_desktops variants

Tested to still boot, SeaBIOS -> Void Linux

Change-Id: Idc61e5d17f4c71fc50cf87c60a5063fc893c1d8c
Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79544
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Riku Viitanen 2023-12-13 23:36:20 +02:00 committed by Felix Held
parent 69686564ec
commit e1914693ce
21 changed files with 60 additions and 411 deletions

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@ -1,41 +0,0 @@
## SPDX-License-Identifier: GPL-2.0-only
if BOARD_HP_COMPAQ_ELITE_8300_USDT
config BOARD_SPECIFIC_OPTIONS
def_bool y
select BOARD_ROMSIZE_KB_16384
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select HAVE_CMOS_DEFAULT
select HAVE_OPTION_TABLE
select INTEL_GMA_HAVE_VBT
select INTEL_INT15
select MAINBOARD_HAS_TPM1
select MAINBOARD_HAS_LIBGFXINIT
select MAINBOARD_USES_IFD_GBE_REGION
select MEMORY_MAPPED_TPM
select NORTHBRIDGE_INTEL_SANDYBRIDGE
select SERIRQ_CONTINUOUS_MODE
select SOUTHBRIDGE_INTEL_C216
select SUPERIO_NUVOTON_NPCD378
select USE_NATIVE_RAMINIT
config CBFS_SIZE
default 0x570000
config MAINBOARD_DIR
default "hp/compaq_elite_8300_usdt"
config MAINBOARD_PART_NUMBER
default "HP Compaq Elite 8300 USDT"
config VGA_BIOS_ID
default "8086,0152"
config DRAM_RESET_GATE_GPIO
default 60
config USBDEBUG_HCD_INDEX # FIXME: check this
default 2
endif

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@ -1,4 +0,0 @@
## SPDX-License-Identifier: GPL-2.0-only
config BOARD_HP_COMPAQ_ELITE_8300_USDT
bool "Compaq Elite 8300 USDT"

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@ -1,7 +0,0 @@
## SPDX-License-Identifier: GPL-2.0-only
bootblock-y += early_init.c
bootblock-y += gpio.c
romstage-y += early_init.c
romstage-y += gpio.c
ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads

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@ -1 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */

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@ -1,10 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
Method(_WAK, 1)
{
Return(Package() {0, 0})
}
Method(_PTS, 1)
{
}

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@ -1,29 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* Copied over from compaq_8200_elite_sff/acpi/superio.asl */
#include <superio/nuvoton/npcd378/acpi/superio.asl>
Scope (\_GPE)
{
Method (_L0D, 0, NotSerialized)
{
Notify (\_SB.PCI0.EHC1, 0x02)
Notify (\_SB.PCI0.EHC2, 0x02)
//FIXME: Add GBE device
//Notify (\_SB.PCI0.GBE, 0x02)
}
Method (_L09, 0, NotSerialized)
{
Notify (\_SB.PCI0.RP01, 0x02)
Notify (\_SB.PCI0.RP02, 0x02)
Notify (\_SB.PCI0.RP03, 0x02)
Notify (\_SB.PCI0.RP04, 0x02)
Notify (\_SB.PCI0.RP05, 0x02)
Notify (\_SB.PCI0.RP06, 0x02)
Notify (\_SB.PCI0.RP07, 0x02)
Notify (\_SB.PCI0.RP08, 0x02)
Notify (\_SB.PCI0.PEGP, 0x02)
}
}

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@ -1,12 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{
/* Temperature at which OS will shutdown */
gnvs->tcrt = 100;
/* Temperature at which OS will throttle CPU */
gnvs->tpsv = 90;
}

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@ -1,8 +0,0 @@
## SPDX-License-Identifier: GPL-2.0-only
boot_option=Fallback
debug_level=Debug
power_on_after_fail=Enable
nmi=Enable
sata_mode=AHCI
gfx_uma_size=32M

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@ -1,73 +0,0 @@
## SPDX-License-Identifier: GPL-2.0-only
# -----------------------------------------------------------------
entries
# -----------------------------------------------------------------
0 120 r 0 reserved_memory
# -----------------------------------------------------------------
# RTC_BOOT_BYTE (coreboot hardcoded)
384 1 e 4 boot_option
388 4 h 0 reboot_counter
# -----------------------------------------------------------------
# coreboot config options: console
395 4 e 6 debug_level
# coreboot config options: southbridge
408 1 e 1 nmi
409 2 e 7 power_on_after_fail
421 1 e 9 sata_mode
# coreboot config options: northbridge
432 3 e 11 gfx_uma_size
448 128 r 0 vbnv
# SandyBridge MRC Scrambler Seed values
896 32 r 0 mrc_scrambler_seed
928 32 r 0 mrc_scrambler_seed_s3
960 16 r 0 mrc_scrambler_seed_chk
# coreboot config options: check sums
984 16 h 0 check_sum
# -----------------------------------------------------------------
enumerations
#ID value text
1 0 Disable
1 1 Enable
2 0 Enable
2 1 Disable
4 0 Fallback
4 1 Normal
6 0 Emergency
6 1 Alert
6 2 Critical
6 3 Error
6 4 Warning
6 5 Notice
6 6 Info
6 7 Debug
6 8 Spew
7 0 Disable
7 1 Enable
7 2 Keep
9 0 AHCI
9 1 IDE
11 0 32M
11 1 64M
11 2 96M
11 3 128M
11 4 160M
11 5 192M
11 6 224M
# -----------------------------------------------------------------
checksums
checksum 392 415 984

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@ -1,162 +0,0 @@
chip northbridge/intel/sandybridge
register "gpu_dp_b_hotplug" = "4"
register "gpu_dp_c_hotplug" = "4"
# BTX mainboard: Reversed mapping
register "spd_addresses" = "{0, 0x52, 0, 0x50}"
device domain 0x0 on
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "docking_supported" = "0"
register "gen1_dec" = "0x00fc0a01"
register "gen2_dec" = "0x00fc0801"
register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }"
register "pcie_port_coalesce" = "1"
register "sata_interface_speed_support" = "0x3"
register "sata_port_map" = "0x7" # 0x1: 2.5" slot
# 0x2: DVD
# 0x4: mSATA
register "spi_lvscc" = "0x2005"
register "spi_uvscc" = "0x2005"
register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
register "usb_port_config" = "{
{ 1, 0, 0 },
{ 1, 0, 0 },
{ 1, 0, 1 },
{ 1, 0, 1 },
{ 1, 0, 2 },
{ 1, 0, 2 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 0, 4 },
{ 1, 0, 4 },
{ 1, 0, 6 },
{ 1, 0, 5 },
{ 1, 0, 5 },
{ 1, 0, 6 }
}"
device ref xhci on # USB 3.0 Controller
subsystemid 0x103c 0x3398
end
device ref mei1 off # Management Engine Interface 1
end
device ref gbe on # Intel Gigabit Ethernet
subsystemid 0x103c 0x3398
end
device ref ehci2 on # USB2 EHCI #2
subsystemid 0x103c 0x3398
end
device ref hda on # High Definition Audio
subsystemid 0x103c 0x3398
end
device ref pcie_rp1 on # Mini-PCIe WLAN
end
device ref ehci1 on # USB2 EHCI #1
subsystemid 0x103c 0x3398
end
device ref pci_bridge on # PCI bridge
subsystemid 0x103c 0x3398
end
device ref lpc on # LPC bridge
chip superio/common # Super I/O grabbed from 8200SFF devicetree
device pnp 2e.ff on # passes SIO base addr to SSDT gen
chip superio/nuvoton/npcd378
device pnp 2e.0 off end # Floppy
device pnp 2e.1 off end # Parallel
device pnp 2e.2 off # COM1
io 0x60 = 0x2f8
irq 0x70 = 3
end
device pnp 2e.3 on # COM2, IR
io 0x60 = 0x3f8
irq 0x70 = 4
end
device pnp 2e.4 on # LED control
io 0x60 = 0x600
# IOBASE[0h] = bit0 LED red / green
# IOBASE[0h] = bit1-4 LED PWM duty cycle
# IOBASE[1h] = bit6 SWCC
io 0x62 = 0x610
# IOBASE [0h] = GPES
# IOBASE [1h] = GPEE
# IOBASE [4h:7h] = 32bit upcounter at 1Mhz
# IOBASE [8h:bh] = GPS
# IOBASE [ch:fh] = GPE
end
device pnp 2e.5 on # Mouse
irq 0x70 = 0xc
end
device pnp 2e.6 on # Keyboard
io 0x60 = 0x0060
io 0x62 = 0x0064
irq 0x70 = 0x01
# serialice: Vendor writes:
drq 0xf0 = 0x40
end
device pnp 2e.7 on # WDT ?
io 0x60 = 0x620
end
device pnp 2e.8 on # HWM
io 0x60 = 0x800
# IOBASE[0h:feh] HWM page
# IOBASE[ffh] bit0-bit3 page selector
drq 0xf0 = 0x20
drq 0xf1 = 0x01
drq 0xf2 = 0x40
drq 0xf3 = 0x01
drq 0xf4 = 0x66
drq 0xf5 = 0x67
drq 0xf6 = 0x66
drq 0xf7 = 0x01
end
device pnp 2e.f on # GPIO OD ?
drq 0xf1 = 0x97
drq 0xf2 = 0x01
drq 0xf5 = 0x08
drq 0xfe = 0x80
end
device pnp 2e.15 on # BUS ?
io 0x60 = 0x0680
io 0x62 = 0x0690
end
device pnp 2e.1c on # Suspend Control ?
io 0x60 = 0x640
# writing to IOBASE[5h]
# 0x0: Power off
# 0x9: Power off and bricked until CMOS battery removed
end
device pnp 2e.1e on # GPIO ?
io 0x60 = 0x660
drq 0xf4 = 0x01
# skip the following, as it
# looks like remapped registers
#drq 0xf5 = 0x06
#drq 0xf6 = 0x60
#drq 0xfe = 0x03
end
end
end
end
chip drivers/pc80/tpm
device pnp 4e.0 on end # TPM module
end
end
device ref sata1 on # SATA Controller 1
subsystemid 0x103c 0x3398
end
device ref smbus on # SMBus
subsystemid 0x103c 0x3398
end
end
device ref host_bridge on # Host bridge Host bridge
subsystemid 0x103c 0x3398
end
device ref peg10 on end # PEG
device ref igd on # iGPU
subsystemid 0x103c 0x3398
end
end
end

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@ -1,30 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi.h>
#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
DefinitionBlock(
"dsdt.aml",
"DSDT",
ACPI_DSDT_REV_2,
OEM_ID,
ACPI_TABLE_CREATOR,
0x20141018 /* OEM revision */
)
{
#include <acpi/dsdt_top.asl>
#include "acpi/platform.asl"
#include <cpu/intel/common/acpi/cpu.asl>
#include <southbridge/intel/common/acpi/platform.asl>
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Device (\_SB.PCI0)
{
#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
#include <southbridge/intel/bd82x6x/acpi/pch.asl>
}
}

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@ -1,16 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/device.h>
#include <drivers/intel/gma/int15.h>
#include <southbridge/intel/bd82x6x/pch.h>
static void mainboard_enable(struct device *dev)
{
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_NONE,
GMA_INT15_PANEL_FIT_DEFAULT,
GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
}
struct chip_operations mainboard_ops = {
.enable_dev = mainboard_enable,
};

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@ -17,6 +17,11 @@ config BOARD_HP_SNB_IVB_DESKTOPS_COMMON
select SUPERIO_NUVOTON_NPCD378
select USE_NATIVE_RAMINIT
config BOARD_HP_COMPAQ_ELITE_8300_USDT
select BOARD_HP_SNB_IVB_DESKTOPS_COMMON
select SOUTHBRIDGE_INTEL_C216
select BOARD_ROMSIZE_KB_16384
config BOARD_HP_Z220_CMT_WORKSTATION
select BOARD_HP_SNB_IVB_DESKTOPS_COMMON
select BOARD_ROMSIZE_KB_16384
@ -46,10 +51,12 @@ config MAINBOARD_DIR
default "hp/snb_ivb_desktops"
config VARIANT_DIR
default "compaq_elite_8300_usdt" if BOARD_HP_COMPAQ_ELITE_8300_USDT
default "z220_cmt_workstation" if BOARD_HP_Z220_CMT_WORKSTATION
default "z220_sff_workstation" if BOARD_HP_Z220_SFF_WORKSTATION
config MAINBOARD_PART_NUMBER
default "HP Compaq Elite 8300 USDT" if BOARD_HP_COMPAQ_ELITE_8300_USDT
default "HP Z220 CMT Workstation" if BOARD_HP_Z220_CMT_WORKSTATION
default "HP Z220 SFF Workstation" if BOARD_HP_Z220_SFF_WORKSTATION
@ -63,7 +70,7 @@ config DRAM_RESET_GATE_GPIO
int
default 60
config USBDEBUG_HCD_INDEX
config USBDEBUG_HCD_INDEX # FIXME: check this on USDT
int
default 2
endif

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@ -1,5 +1,8 @@
## SPDX-License-Identifier: GPL-2.0-only
config BOARD_HP_COMPAQ_ELITE_8300_USDT
bool "Compaq Elite 8300 USDT"
config BOARD_HP_Z220_CMT_WORKSTATION
bool "Z220 CMT Workstation"

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@ -6,23 +6,6 @@
#include <device/pci_ops.h>
#include <southbridge/intel/bd82x6x/pch.h>
const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 0, 0 },
{ 1, 0, 0 },
{ 1, 0, 1 },
{ 1, 0, 1 },
{ 1, 0, 2 },
{ 1, 0, 2 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 0, 4 },
{ 1, 0, 4 },
{ 1, 0, 6 },
{ 1, 0, 5 },
{ 1, 0, 5 },
{ 1, 0, 6 },
};
void bootblock_mainboard_early_init(void)
{
pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x1408);

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@ -0,0 +1,49 @@
## SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/sandybridge
register "gpu_dp_b_hotplug" = "4"
register "gpu_dp_c_hotplug" = "4"
# Two SO-DIMMs
register "spd_addresses" = "{0, 0x52, 0, 0x50}"
device domain 0 on
subsystemid 0x103c 0x3398 inherit
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
register "gen1_dec" = "0x00fc0a01"
# 0x1: 2.5", 0x2: DVD, 0x4: mSATA
register "sata_port_map" = "0x7"
register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
register "usb_port_config" = "{
{ 1, 0, 0 },
{ 1, 0, 0 },
{ 1, 0, 1 },
{ 1, 0, 1 },
{ 1, 0, 2 },
{ 1, 0, 2 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 0, 4 },
{ 1, 0, 4 },
{ 1, 0, 6 },
{ 1, 0, 5 },
{ 1, 0, 5 },
{ 1, 0, 6 },
}"
device ref xhci on end
device ref lpc on
chip superio/common
device pnp 2e.ff on
chip superio/nuvoton/npcd378
# Parallel port
device pnp 2e.1 off end
end
end
end
end
end
end
end