mb/hp: Move compaq_elite_8300_usdt into snb_ivb_desktops variants
Tested to still boot, SeaBIOS -> Void Linux Change-Id: Idc61e5d17f4c71fc50cf87c60a5063fc893c1d8c Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79544 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
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69686564ec
commit
e1914693ce
@ -1,41 +0,0 @@
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## SPDX-License-Identifier: GPL-2.0-only
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if BOARD_HP_COMPAQ_ELITE_8300_USDT
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config BOARD_SPECIFIC_OPTIONS
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def_bool y
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select BOARD_ROMSIZE_KB_16384
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_TABLES
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select HAVE_CMOS_DEFAULT
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select HAVE_OPTION_TABLE
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select INTEL_GMA_HAVE_VBT
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select INTEL_INT15
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select MAINBOARD_HAS_TPM1
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select MAINBOARD_HAS_LIBGFXINIT
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select MAINBOARD_USES_IFD_GBE_REGION
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select MEMORY_MAPPED_TPM
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select NORTHBRIDGE_INTEL_SANDYBRIDGE
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select SERIRQ_CONTINUOUS_MODE
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select SOUTHBRIDGE_INTEL_C216
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select SUPERIO_NUVOTON_NPCD378
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select USE_NATIVE_RAMINIT
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config CBFS_SIZE
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default 0x570000
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config MAINBOARD_DIR
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default "hp/compaq_elite_8300_usdt"
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config MAINBOARD_PART_NUMBER
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default "HP Compaq Elite 8300 USDT"
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config VGA_BIOS_ID
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default "8086,0152"
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config DRAM_RESET_GATE_GPIO
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default 60
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config USBDEBUG_HCD_INDEX # FIXME: check this
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default 2
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endif
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@ -1,4 +0,0 @@
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## SPDX-License-Identifier: GPL-2.0-only
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config BOARD_HP_COMPAQ_ELITE_8300_USDT
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bool "Compaq Elite 8300 USDT"
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@ -1,7 +0,0 @@
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## SPDX-License-Identifier: GPL-2.0-only
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bootblock-y += early_init.c
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bootblock-y += gpio.c
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romstage-y += early_init.c
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romstage-y += gpio.c
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ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
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@ -1 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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@ -1,10 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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Method(_WAK, 1)
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{
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Return(Package() {0, 0})
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}
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Method(_PTS, 1)
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{
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}
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@ -1,29 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copied over from compaq_8200_elite_sff/acpi/superio.asl */
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#include <superio/nuvoton/npcd378/acpi/superio.asl>
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Scope (\_GPE)
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{
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Method (_L0D, 0, NotSerialized)
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{
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Notify (\_SB.PCI0.EHC1, 0x02)
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Notify (\_SB.PCI0.EHC2, 0x02)
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//FIXME: Add GBE device
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//Notify (\_SB.PCI0.GBE, 0x02)
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}
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Method (_L09, 0, NotSerialized)
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{
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Notify (\_SB.PCI0.RP01, 0x02)
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Notify (\_SB.PCI0.RP02, 0x02)
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Notify (\_SB.PCI0.RP03, 0x02)
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Notify (\_SB.PCI0.RP04, 0x02)
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Notify (\_SB.PCI0.RP05, 0x02)
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Notify (\_SB.PCI0.RP06, 0x02)
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Notify (\_SB.PCI0.RP07, 0x02)
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Notify (\_SB.PCI0.RP08, 0x02)
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Notify (\_SB.PCI0.PEGP, 0x02)
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}
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}
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@ -1,12 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <acpi/acpi_gnvs.h>
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#include <soc/nvs.h>
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void mainboard_fill_gnvs(struct global_nvs *gnvs)
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{
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/* Temperature at which OS will shutdown */
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gnvs->tcrt = 100;
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/* Temperature at which OS will throttle CPU */
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gnvs->tpsv = 90;
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}
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@ -1,8 +0,0 @@
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## SPDX-License-Identifier: GPL-2.0-only
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boot_option=Fallback
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debug_level=Debug
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power_on_after_fail=Enable
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nmi=Enable
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sata_mode=AHCI
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gfx_uma_size=32M
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@ -1,73 +0,0 @@
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## SPDX-License-Identifier: GPL-2.0-only
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# -----------------------------------------------------------------
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entries
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# -----------------------------------------------------------------
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0 120 r 0 reserved_memory
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# -----------------------------------------------------------------
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# RTC_BOOT_BYTE (coreboot hardcoded)
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384 1 e 4 boot_option
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388 4 h 0 reboot_counter
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# -----------------------------------------------------------------
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# coreboot config options: console
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395 4 e 6 debug_level
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# coreboot config options: southbridge
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408 1 e 1 nmi
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409 2 e 7 power_on_after_fail
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421 1 e 9 sata_mode
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# coreboot config options: northbridge
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432 3 e 11 gfx_uma_size
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448 128 r 0 vbnv
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# SandyBridge MRC Scrambler Seed values
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896 32 r 0 mrc_scrambler_seed
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928 32 r 0 mrc_scrambler_seed_s3
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960 16 r 0 mrc_scrambler_seed_chk
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# coreboot config options: check sums
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984 16 h 0 check_sum
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# -----------------------------------------------------------------
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enumerations
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#ID value text
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1 0 Disable
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1 1 Enable
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2 0 Enable
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2 1 Disable
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4 0 Fallback
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4 1 Normal
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6 0 Emergency
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6 1 Alert
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6 2 Critical
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6 3 Error
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6 4 Warning
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6 5 Notice
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6 6 Info
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6 7 Debug
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6 8 Spew
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7 0 Disable
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7 1 Enable
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7 2 Keep
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9 0 AHCI
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9 1 IDE
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11 0 32M
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11 1 64M
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11 2 96M
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11 3 128M
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11 4 160M
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11 5 192M
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11 6 224M
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# -----------------------------------------------------------------
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checksums
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checksum 392 415 984
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@ -1,162 +0,0 @@
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chip northbridge/intel/sandybridge
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register "gpu_dp_b_hotplug" = "4"
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register "gpu_dp_c_hotplug" = "4"
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# BTX mainboard: Reversed mapping
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register "spd_addresses" = "{0, 0x52, 0, 0x50}"
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device domain 0x0 on
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chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
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register "docking_supported" = "0"
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register "gen1_dec" = "0x00fc0a01"
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register "gen2_dec" = "0x00fc0801"
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register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }"
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register "pcie_port_coalesce" = "1"
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register "sata_interface_speed_support" = "0x3"
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register "sata_port_map" = "0x7" # 0x1: 2.5" slot
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# 0x2: DVD
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# 0x4: mSATA
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register "spi_lvscc" = "0x2005"
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register "spi_uvscc" = "0x2005"
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_overcurrent_mapping" = "0x00000c03"
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register "xhci_switchable_ports" = "0x0000000f"
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register "usb_port_config" = "{
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{ 1, 0, 0 },
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{ 1, 0, 0 },
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{ 1, 0, 1 },
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{ 1, 0, 1 },
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{ 1, 0, 2 },
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{ 1, 0, 2 },
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{ 1, 0, 3 },
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{ 1, 0, 3 },
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{ 1, 0, 4 },
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{ 1, 0, 4 },
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{ 1, 0, 6 },
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{ 1, 0, 5 },
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{ 1, 0, 5 },
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{ 1, 0, 6 }
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}"
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device ref xhci on # USB 3.0 Controller
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subsystemid 0x103c 0x3398
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end
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device ref mei1 off # Management Engine Interface 1
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end
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device ref gbe on # Intel Gigabit Ethernet
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subsystemid 0x103c 0x3398
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end
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device ref ehci2 on # USB2 EHCI #2
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subsystemid 0x103c 0x3398
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end
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device ref hda on # High Definition Audio
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subsystemid 0x103c 0x3398
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end
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device ref pcie_rp1 on # Mini-PCIe WLAN
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end
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device ref ehci1 on # USB2 EHCI #1
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subsystemid 0x103c 0x3398
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end
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device ref pci_bridge on # PCI bridge
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subsystemid 0x103c 0x3398
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end
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device ref lpc on # LPC bridge
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chip superio/common # Super I/O grabbed from 8200SFF devicetree
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device pnp 2e.ff on # passes SIO base addr to SSDT gen
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chip superio/nuvoton/npcd378
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device pnp 2e.0 off end # Floppy
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device pnp 2e.1 off end # Parallel
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device pnp 2e.2 off # COM1
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io 0x60 = 0x2f8
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irq 0x70 = 3
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end
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device pnp 2e.3 on # COM2, IR
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.4 on # LED control
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io 0x60 = 0x600
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# IOBASE[0h] = bit0 LED red / green
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# IOBASE[0h] = bit1-4 LED PWM duty cycle
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# IOBASE[1h] = bit6 SWCC
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io 0x62 = 0x610
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# IOBASE [0h] = GPES
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# IOBASE [1h] = GPEE
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# IOBASE [4h:7h] = 32bit upcounter at 1Mhz
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# IOBASE [8h:bh] = GPS
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# IOBASE [ch:fh] = GPE
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end
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device pnp 2e.5 on # Mouse
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irq 0x70 = 0xc
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end
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device pnp 2e.6 on # Keyboard
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io 0x60 = 0x0060
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io 0x62 = 0x0064
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irq 0x70 = 0x01
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# serialice: Vendor writes:
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drq 0xf0 = 0x40
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end
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device pnp 2e.7 on # WDT ?
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io 0x60 = 0x620
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end
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device pnp 2e.8 on # HWM
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io 0x60 = 0x800
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# IOBASE[0h:feh] HWM page
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# IOBASE[ffh] bit0-bit3 page selector
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drq 0xf0 = 0x20
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drq 0xf1 = 0x01
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drq 0xf2 = 0x40
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drq 0xf3 = 0x01
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drq 0xf4 = 0x66
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drq 0xf5 = 0x67
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drq 0xf6 = 0x66
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drq 0xf7 = 0x01
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end
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device pnp 2e.f on # GPIO OD ?
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drq 0xf1 = 0x97
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drq 0xf2 = 0x01
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drq 0xf5 = 0x08
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drq 0xfe = 0x80
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end
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device pnp 2e.15 on # BUS ?
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io 0x60 = 0x0680
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io 0x62 = 0x0690
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end
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device pnp 2e.1c on # Suspend Control ?
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io 0x60 = 0x640
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# writing to IOBASE[5h]
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# 0x0: Power off
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# 0x9: Power off and bricked until CMOS battery removed
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end
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device pnp 2e.1e on # GPIO ?
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io 0x60 = 0x660
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drq 0xf4 = 0x01
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# skip the following, as it
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# looks like remapped registers
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#drq 0xf5 = 0x06
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#drq 0xf6 = 0x60
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#drq 0xfe = 0x03
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end
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end
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end
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end
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chip drivers/pc80/tpm
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device pnp 4e.0 on end # TPM module
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end
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end
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device ref sata1 on # SATA Controller 1
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subsystemid 0x103c 0x3398
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end
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device ref smbus on # SMBus
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subsystemid 0x103c 0x3398
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end
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end
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device ref host_bridge on # Host bridge Host bridge
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subsystemid 0x103c 0x3398
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end
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device ref peg10 on end # PEG
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device ref igd on # iGPU
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subsystemid 0x103c 0x3398
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end
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end
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end
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@ -1,30 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <acpi/acpi.h>
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#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
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#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
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DefinitionBlock(
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"dsdt.aml",
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"DSDT",
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ACPI_DSDT_REV_2,
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OEM_ID,
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ACPI_TABLE_CREATOR,
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0x20141018 /* OEM revision */
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)
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{
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#include <acpi/dsdt_top.asl>
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#include "acpi/platform.asl"
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#include <cpu/intel/common/acpi/cpu.asl>
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#include <southbridge/intel/common/acpi/platform.asl>
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#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
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#include <southbridge/intel/common/acpi/sleepstates.asl>
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Device (\_SB.PCI0)
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{
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#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
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#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
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#include <southbridge/intel/bd82x6x/acpi/pch.asl>
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}
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}
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <device/device.h>
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#include <drivers/intel/gma/int15.h>
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#include <southbridge/intel/bd82x6x/pch.h>
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static void mainboard_enable(struct device *dev)
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{
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install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_NONE,
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GMA_INT15_PANEL_FIT_DEFAULT,
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GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
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}
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struct chip_operations mainboard_ops = {
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.enable_dev = mainboard_enable,
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};
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@ -17,6 +17,11 @@ config BOARD_HP_SNB_IVB_DESKTOPS_COMMON
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select SUPERIO_NUVOTON_NPCD378
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select USE_NATIVE_RAMINIT
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config BOARD_HP_COMPAQ_ELITE_8300_USDT
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select BOARD_HP_SNB_IVB_DESKTOPS_COMMON
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select SOUTHBRIDGE_INTEL_C216
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select BOARD_ROMSIZE_KB_16384
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config BOARD_HP_Z220_CMT_WORKSTATION
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select BOARD_HP_SNB_IVB_DESKTOPS_COMMON
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select BOARD_ROMSIZE_KB_16384
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@ -46,10 +51,12 @@ config MAINBOARD_DIR
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default "hp/snb_ivb_desktops"
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config VARIANT_DIR
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default "compaq_elite_8300_usdt" if BOARD_HP_COMPAQ_ELITE_8300_USDT
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default "z220_cmt_workstation" if BOARD_HP_Z220_CMT_WORKSTATION
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default "z220_sff_workstation" if BOARD_HP_Z220_SFF_WORKSTATION
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config MAINBOARD_PART_NUMBER
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default "HP Compaq Elite 8300 USDT" if BOARD_HP_COMPAQ_ELITE_8300_USDT
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default "HP Z220 CMT Workstation" if BOARD_HP_Z220_CMT_WORKSTATION
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default "HP Z220 SFF Workstation" if BOARD_HP_Z220_SFF_WORKSTATION
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@ -63,7 +70,7 @@ config DRAM_RESET_GATE_GPIO
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int
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default 60
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config USBDEBUG_HCD_INDEX
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config USBDEBUG_HCD_INDEX # FIXME: check this on USDT
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int
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default 2
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endif
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@ -1,5 +1,8 @@
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## SPDX-License-Identifier: GPL-2.0-only
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config BOARD_HP_COMPAQ_ELITE_8300_USDT
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bool "Compaq Elite 8300 USDT"
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config BOARD_HP_Z220_CMT_WORKSTATION
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bool "Z220 CMT Workstation"
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@ -6,23 +6,6 @@
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#include <device/pci_ops.h>
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#include <southbridge/intel/bd82x6x/pch.h>
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const struct southbridge_usb_port mainboard_usb_ports[] = {
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{ 1, 0, 0 },
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{ 1, 0, 0 },
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{ 1, 0, 1 },
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{ 1, 0, 1 },
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{ 1, 0, 2 },
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{ 1, 0, 2 },
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{ 1, 0, 3 },
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{ 1, 0, 3 },
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{ 1, 0, 4 },
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{ 1, 0, 4 },
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{ 1, 0, 6 },
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{ 1, 0, 5 },
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{ 1, 0, 5 },
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{ 1, 0, 6 },
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};
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|
||||
void bootblock_mainboard_early_init(void)
|
||||
{
|
||||
pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x1408);
|
@ -0,0 +1,49 @@
|
||||
## SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
chip northbridge/intel/sandybridge
|
||||
register "gpu_dp_b_hotplug" = "4"
|
||||
register "gpu_dp_c_hotplug" = "4"
|
||||
# Two SO-DIMMs
|
||||
register "spd_addresses" = "{0, 0x52, 0, 0x50}"
|
||||
|
||||
device domain 0 on
|
||||
subsystemid 0x103c 0x3398 inherit
|
||||
|
||||
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
|
||||
register "gen1_dec" = "0x00fc0a01"
|
||||
# 0x1: 2.5", 0x2: DVD, 0x4: mSATA
|
||||
register "sata_port_map" = "0x7"
|
||||
register "superspeed_capable_ports" = "0x0000000f"
|
||||
register "xhci_overcurrent_mapping" = "0x00000c03"
|
||||
register "xhci_switchable_ports" = "0x0000000f"
|
||||
register "usb_port_config" = "{
|
||||
{ 1, 0, 0 },
|
||||
{ 1, 0, 0 },
|
||||
{ 1, 0, 1 },
|
||||
{ 1, 0, 1 },
|
||||
{ 1, 0, 2 },
|
||||
{ 1, 0, 2 },
|
||||
{ 1, 0, 3 },
|
||||
{ 1, 0, 3 },
|
||||
{ 1, 0, 4 },
|
||||
{ 1, 0, 4 },
|
||||
{ 1, 0, 6 },
|
||||
{ 1, 0, 5 },
|
||||
{ 1, 0, 5 },
|
||||
{ 1, 0, 6 },
|
||||
}"
|
||||
|
||||
device ref xhci on end
|
||||
device ref lpc on
|
||||
chip superio/common
|
||||
device pnp 2e.ff on
|
||||
chip superio/nuvoton/npcd378
|
||||
# Parallel port
|
||||
device pnp 2e.1 off end
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
Loading…
x
Reference in New Issue
Block a user