soc/amd: move psp_verstage to amd/common
psp_verstage is not specific to picasso. There might be picasso-specific code but move everything into common as a first step. While developing psp_verstage for cezanne picasso-specific code will move back to picasso directory. BUG=b:182477057 BRANCH=none TEST=build psp_verstage on zork Signed-off-by: Kangheui Won <khwon@chromium.org> Change-Id: Ifb1df0d82b972f28be2ffebd476c2553cbda9810 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52306 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Kangheui Won
committed by
Martin Roth
Martin Roth
parent
d9ce2859a3
commit
e20bc464fb
@@ -7,6 +7,7 @@ subdirs-y += ../../../cpu/x86/cache
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subdirs-y += ../../../cpu/x86/mtrr
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subdirs-y += ../../../cpu/x86/pae
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subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage
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subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += ../common/psp_verstage
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# Beware that all-y also adds the compilation unit to verstage on PSP
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all-y += config.c
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@@ -2,26 +2,6 @@
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verstage-generic-ccopts += -I$(src)/soc/amd/picasso/psp_verstage/include
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verstage-generic-ccopts += -I$(src)/vendorcode/amd/fsp/picasso/include
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verstage-generic-ccopts += -D__USER_SPACE__
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CPPFLAGS_common += -I$(VBOOT_SOURCE)/firmware/2lib/include/
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# This size should match the size in the linker script.
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CFLAGS_arm += -Wstack-usage=40960
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verstage-y += delay.c
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verstage-y += fch.c
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verstage-y += pmutil.c
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verstage-y += post.c
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verstage-y += printk.c
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verstage-y += psp_verstage.c
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verstage-y += psp.c
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verstage-y += reset.c
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verstage-y += svc.c
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verstage-y += timer.c
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verstage-y += vboot_crypto.c
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verstage-y += $(top)/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_startup.S
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verstage-y += $(top)/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S
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$(obj)/psp_verstage.bin: $(objcbfs)/verstage.elf
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$(OBJCOPY_verstage) -O binary $^ $@
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@@ -1,10 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <bl_uapp/bl_syscall_public.h>
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#include <delay.h>
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#include <stdint.h>
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void udelay(uint32_t usecs)
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{
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svc_delay_in_usec(usecs);
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}
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@@ -1,158 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include "psp_verstage.h"
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#include <amdblocks/acpimmio.h>
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#include <amdblocks/espi.h>
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#include <amdblocks/spi.h>
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#include <arch/exception.h>
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#include <arch/hlt.h>
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#include <arch/io.h>
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#include <bl_uapp/bl_errorcodes_public.h>
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#include <bl_uapp/bl_syscall_public.h>
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#include <console/console.h>
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#include <soc/i2c.h>
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#include <soc/southbridge.h>
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#include <stdint.h>
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static void i2c3_set_bar(void *bar)
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{
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i2c_set_bar(3, (uintptr_t)bar);
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}
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static void i2c2_set_bar(void *bar)
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{
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i2c_set_bar(2, (uintptr_t)bar);
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}
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static void espi_set_bar(void *bar)
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{
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espi_update_static_bar((uintptr_t)bar);
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}
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static void iomux_set_bar(void *bar)
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{
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acpimmio_iomux = bar;
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}
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static void misc_set_bar(void *bar)
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{
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acpimmio_misc = bar;
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}
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static void gpio_set_bar(void *bar)
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{
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acpimmio_gpio0 = bar;
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}
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static uintptr_t io_bar;
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static void io_set_bar(void *bar)
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{
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io_bar = (uintptr_t)bar;
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}
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u8 io_read8(u16 reg)
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{
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return read8((void *)(io_bar + reg));
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}
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void io_write8(u16 reg, u8 value)
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{
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write8((void *)(io_bar + reg), value);
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}
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static void aoac_set_bar(void *bar)
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{
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acpimmio_aoac = bar;
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}
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static struct {
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const char *name;
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struct {
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enum fch_io_device device;
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uint32_t arg0;
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} args;
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void (*set_bar)(void *bar);
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void *_bar;
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} bar_map[] = {
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{"IOMUX", {FCH_IO_DEVICE_IOMUX}, iomux_set_bar},
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{"MISC", {FCH_IO_DEVICE_MISC}, misc_set_bar},
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{"GPIO", {FCH_IO_DEVICE_GPIO}, gpio_set_bar},
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{"IO", {FCH_IO_DEVICE_IOPORT}, io_set_bar},
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{"eSPI", {FCH_IO_DEVICE_ESPI}, espi_set_bar},
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{"I2C2", {FCH_IO_DEVICE_I2C, 2}, i2c2_set_bar},
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{"I2C3", {FCH_IO_DEVICE_I2C, 3}, i2c3_set_bar},
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{"SPI", {FCH_IO_DEVICE_SPI}, spi_set_base},
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{"AOAC", {FCH_IO_DEVICE_AOAC}, aoac_set_bar},
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};
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uintptr_t *map_spi_rom(void)
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{
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uintptr_t *addr = NULL;
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struct spirom_info spi = {0};
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if (svc_get_spi_rom_info(&spi))
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printk(BIOS_DEBUG, "Error getting SPI ROM info.\n");
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if (spi.SpiBiosSmnBase != 0)
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if (svc_map_spi_rom(spi.SpiBiosSmnBase, CONFIG_ROM_SIZE, (void **)&addr))
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printk(BIOS_DEBUG, "Error mapping SPI ROM to address.\n");
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return addr;
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}
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static uint32_t map_fch_devices(void)
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{
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void *bar;
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uint32_t err;
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(bar_map); ++i) {
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err = svc_map_fch_dev(bar_map[i].args.device, bar_map[i].args.arg0, 0, &bar);
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if (err) {
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printk(BIOS_ERR, "Failed to map %s: %u\n", bar_map[i].name, err);
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return err;
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}
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bar_map[i]._bar = bar;
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bar_map[i].set_bar(bar);
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}
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return BL_OK;
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}
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uint32_t unmap_fch_devices(void)
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{
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void *bar;
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uint32_t err, rtn = BL_OK;
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(bar_map); ++i) {
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bar = bar_map[i]._bar;
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if (!bar)
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continue;
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err = svc_unmap_fch_dev(bar_map[i].args.device, bar);
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if (err) {
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printk(BIOS_ERR, "Failed to unmap %s: %u\n", bar_map[i].name, err);
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rtn = err;
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} else {
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bar_map[i]._bar = NULL;
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bar_map[i].set_bar(NULL);
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}
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}
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return rtn;
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}
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uint32_t verstage_soc_early_init(void)
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{
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return map_fch_devices();
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}
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void verstage_soc_init(void)
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{
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if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI))
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espi_setup();
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}
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@@ -1,21 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef __ARCH_IO_H__
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#define __ARCH_IO_H__
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#include <stdint.h>
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u8 io_read8(u16 reg);
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void io_write8(u16 reg, u8 value);
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static inline void outb(uint8_t value, uint16_t port)
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{
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io_write8(port, value);
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}
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static inline uint8_t inb(uint16_t port)
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{
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return io_read8(port);
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}
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#endif
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@@ -1,15 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _ARCH_SMP_SPINLOCK_H
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#define _ARCH_SMP_SPINLOCK_H
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#define DECLARE_SPIN_LOCK(x)
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#define spin_is_locked(lock) 0
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#define spin_unlock_wait(lock) do {} while (0)
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#define spin_lock(lock) do {} while (0)
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#define spin_unlock(lock) do {} while (0)
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#include <smp/node.h>
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#define boot_cpu() 1
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#endif
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@@ -1,20 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <bl_uapp/bl_syscall_public.h>
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#include <bootmode.h>
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#include <console/console.h>
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#include <stdint.h>
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int platform_is_resuming(void)
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{
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uint32_t bootmode = 0;
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if (svc_get_boot_mode(&bootmode)) {
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printk(BIOS_ERR, "Error getting boot mode. Assuming no resume.\n");
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return 0;
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}
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if (bootmode == PSP_BOOT_MODE_S3_RESUME || bootmode == PSP_BOOT_MODE_S0i3_RESUME)
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return 1;
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return 0;
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}
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@@ -1,11 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <bl_uapp/bl_syscall_public.h>
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#include <console/console.h>
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#include <post.h>
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void arch_post_code(u8 value)
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{
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if (CONFIG(POST_IO) && CONFIG_POST_IO_PORT == 0x80)
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svc_write_postcode(value);
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}
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@@ -1,40 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <bl_uapp/bl_syscall_public.h>
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#include <console/console.h>
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#include <console/cbmem_console.h>
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#include <console/streams.h>
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#include <stdarg.h>
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void console_hw_init(void)
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{
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__cbmemc_init();
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}
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int printk(int msg_level, const char *fmt, ...)
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{
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va_list args;
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int i;
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va_start(args, fmt);
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i = vprintk(msg_level, fmt, args);
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va_end(args);
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return i;
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}
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int vprintk(int msg_level, const char *fmt, va_list args)
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{
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int i, cnt, log_this;
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char buf[256];
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log_this = console_log_level(msg_level);
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if (log_this < CONSOLE_LOG_FAST)
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return 0;
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cnt = vsnprintf(buf, sizeof(buf), fmt, args);
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for (i = 0; i < cnt; i++)
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__cbmemc_tx_byte(buf[i]);
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svc_debug_print(buf);
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return i;
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}
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@@ -1,8 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <smp/node.h>
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int boot_cpu(void)
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{
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return 1;
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}
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@@ -1,277 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include "psp_verstage.h"
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#include <amdblocks/acpimmio.h>
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#include <bl_uapp/bl_syscall_public.h>
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#include <boot_device.h>
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#include <cbfs.h>
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#include <console/console.h>
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#include <fmap.h>
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#include <pc80/mc146818rtc.h>
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#include <soc/psp_transfer.h>
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#include <security/vboot/vbnv.h>
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#include <security/vboot/misc.h>
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#include <security/vboot/symbols.h>
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#include <security/vboot/vboot_common.h>
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#include <arch/stages.h>
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#include <stdarg.h>
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#include <stdio.h>
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#include <timestamp.h>
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extern char _bss_start, _bss_end;
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static struct mem_region_device boot_dev =
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MEM_REGION_DEV_RO_INIT(NULL, CONFIG_ROM_SIZE);
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void __weak verstage_mainboard_early_init(void) {}
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void __weak verstage_mainboard_init(void) {}
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static void reboot_into_recovery(struct vb2_context *ctx, uint32_t subcode)
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{
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subcode += PSP_VBOOT_ERROR_SUBCODE;
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svc_write_postcode(subcode);
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/*
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* If there's an error but the PSP_verstage is already booting to RO,
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* don't reset the system. It may be that the error is fatal, but if
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* the system is stuck, don't intentionally force it into a reboot loop.
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*/
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if (ctx->flags & VB2_CONTEXT_RECOVERY_MODE) {
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printk(BIOS_ERR, "Already in recovery mode. Staying in RO.\n");
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return;
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}
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vb2api_fail(ctx, VB2_RECOVERY_RO_UNSPECIFIED, (int)subcode);
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vboot_save_data(ctx);
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svc_debug_print("Rebooting into recovery\n");
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vboot_reboot();
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}
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static uint32_t check_cmos_recovery(void)
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{
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/* Only reset if cmos is valid */
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if (vbnv_cmos_failed())
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return 0;
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/* If the byte is set, clear it, then return error to reboot */
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if (cmos_read(CMOS_RECOVERY_BYTE) == CMOS_RECOVERY_MAGIC_VAL) {
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cmos_write(0x00, CMOS_RECOVERY_BYTE);
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printk(BIOS_DEBUG, "Reboot into recovery requested by coreboot\n");
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return POSTCODE_CMOS_RECOVERY;
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}
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return 0;
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}
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/*
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* Tell the PSP where to load the rest of the firmware from
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*/
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static uint32_t update_boot_region(struct vb2_context *ctx)
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{
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struct psp_ef_table *ef_table;
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uint32_t psp_dir_addr, bios_dir_addr;
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uint32_t *psp_dir_in_spi, *bios_dir_in_spi;
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const char *fname;
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void *amdfw_location;
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/* Continue booting from RO */
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if (ctx->flags & VB2_CONTEXT_RECOVERY_MODE) {
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printk(BIOS_ERR, "In recovery mode. Staying in RO.\n");
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return 0;
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}
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if (vboot_is_firmware_slot_a(ctx)) {
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fname = "apu/amdfw_a";
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} else {
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fname = "apu/amdfw_b";
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}
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amdfw_location = cbfs_map(fname, NULL);
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if (!amdfw_location) {
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printk(BIOS_ERR, "Error: AMD Firmware table not found.\n");
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return POSTCODE_AMD_FW_MISSING;
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}
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ef_table = (struct psp_ef_table *)amdfw_location;
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if (ef_table->signature != EMBEDDED_FW_SIGNATURE) {
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printk(BIOS_ERR, "Error: ROMSIG address is not correct.\n");
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return POSTCODE_ROMSIG_MISMATCH_ERROR;
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}
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psp_dir_addr = ef_table->psp_table;
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bios_dir_addr = ef_table->bios1_entry;
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psp_dir_in_spi = (uint32_t *)((psp_dir_addr & SPI_ADDR_MASK) +
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(uint32_t)boot_dev.base);
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bios_dir_in_spi = (uint32_t *)((bios_dir_addr & SPI_ADDR_MASK) +
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(uint32_t)boot_dev.base);
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if (*psp_dir_in_spi != PSP_COOKIE) {
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printk(BIOS_ERR, "Error: PSP Directory address is not correct.\n");
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return POSTCODE_PSP_COOKIE_MISMATCH_ERROR;
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}
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if (*bios_dir_in_spi != BDT1_COOKIE) {
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printk(BIOS_ERR, "Error: BIOS Directory address is not correct.\n");
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return POSTCODE_BDT1_COOKIE_MISMATCH_ERROR;
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}
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if (svc_update_psp_bios_dir((void *)&psp_dir_addr,
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(void *)&bios_dir_addr, DIR_OFFSET_SET)) {
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printk(BIOS_ERR, "Error: Updated BIOS Directory could not be set.\n");
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return POSTCODE_UPDATE_PSP_BIOS_DIR_ERROR;
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}
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return 0;
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}
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/*
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* Save workbuf (and soon memory console and timestamps) to the bootloader to pass
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* back to coreboot.
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*/
|
||||
static uint32_t save_buffers(struct vb2_context **ctx)
|
||||
{
|
||||
uint32_t retval;
|
||||
uint32_t buffer_size = MIN_TRANSFER_BUFFER_SIZE;
|
||||
uint32_t max_buffer_size;
|
||||
struct transfer_info_struct buffer_info = {0};
|
||||
|
||||
/*
|
||||
* This should never fail, but if it does, we should still try to
|
||||
* save the buffer. If that fails, then we should go to recovery mode.
|
||||
*/
|
||||
if (svc_get_max_workbuf_size(&max_buffer_size)) {
|
||||
post_code(POSTCODE_DEFAULT_BUFFER_SIZE_NOTICE);
|
||||
printk(BIOS_NOTICE, "Notice: using default transfer buffer size.\n");
|
||||
max_buffer_size = MIN_TRANSFER_BUFFER_SIZE;
|
||||
}
|
||||
printk(BIOS_DEBUG, "\nMaximum buffer size: %d bytes\n", max_buffer_size);
|
||||
|
||||
/* Shrink workbuf if MP2 is in use and cannot be used to save buffer */
|
||||
if (max_buffer_size < VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE) {
|
||||
retval = vb2api_relocate(_vboot2_work, _vboot2_work, MIN_WORKBUF_TRANSFER_SIZE,
|
||||
ctx);
|
||||
if (retval != VB2_SUCCESS) {
|
||||
printk(BIOS_ERR, "Error shrinking workbuf. Error code %#x\n", retval);
|
||||
buffer_size = VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE;
|
||||
post_code(POSTCODE_WORKBUF_RESIZE_WARNING);
|
||||
}
|
||||
} else {
|
||||
buffer_size =
|
||||
(uint32_t)((uintptr_t)_etransfer_buffer - (uintptr_t)_transfer_buffer);
|
||||
|
||||
buffer_info.console_offset = (uint32_t)((uintptr_t)_preram_cbmem_console -
|
||||
(uintptr_t)_transfer_buffer);
|
||||
buffer_info.timestamp_offset = (uint32_t)((uintptr_t)_timestamp -
|
||||
(uintptr_t)_transfer_buffer);
|
||||
buffer_info.fmap_offset = (uint32_t)((uintptr_t)_fmap_cache -
|
||||
(uintptr_t)_transfer_buffer);
|
||||
}
|
||||
|
||||
if (buffer_size > max_buffer_size) {
|
||||
printk(BIOS_ERR, "Error: Buffer is larger than max buffer size.\n");
|
||||
post_code(POSTCODE_WORKBUF_BUFFER_SIZE_ERROR);
|
||||
return POSTCODE_WORKBUF_BUFFER_SIZE_ERROR;
|
||||
}
|
||||
|
||||
buffer_info.magic_val = TRANSFER_MAGIC_VAL;
|
||||
buffer_info.struct_bytes = sizeof(buffer_info);
|
||||
buffer_info.buffer_size = buffer_size;
|
||||
buffer_info.workbuf_offset = (uint32_t)((uintptr_t)_fmap_cache -
|
||||
(uintptr_t)_vboot2_work);
|
||||
|
||||
memcpy(_transfer_buffer, &buffer_info, sizeof(buffer_info));
|
||||
|
||||
retval = svc_save_uapp_data(UAPP_COPYBUF_CHROME_WORKBUF, (void *)_transfer_buffer,
|
||||
buffer_size);
|
||||
if (retval) {
|
||||
printk(BIOS_ERR, "Error: Could not save workbuf. Error code 0x%08x\n", retval);
|
||||
return POSTCODE_WORKBUF_SAVE_ERROR;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void Main(void)
|
||||
{
|
||||
uint32_t retval;
|
||||
struct vb2_context *ctx = NULL;
|
||||
|
||||
/*
|
||||
* Do not use printk() before console_init()
|
||||
* Do not use post_code() before verstage_mainboard_init()
|
||||
*/
|
||||
timestamp_init(timestamp_get());
|
||||
svc_write_postcode(POSTCODE_ENTERED_PSP_VERSTAGE);
|
||||
svc_debug_print("Entering verstage on PSP\n");
|
||||
memset(&_bss_start, '\0', &_bss_end - &_bss_start);
|
||||
|
||||
svc_write_postcode(POSTCODE_CONSOLE_INIT);
|
||||
console_init();
|
||||
|
||||
svc_write_postcode(POSTCODE_EARLY_INIT);
|
||||
retval = verstage_soc_early_init();
|
||||
if (retval) {
|
||||
svc_debug_print("verstage_soc_early_init failed\n");
|
||||
reboot_into_recovery(NULL, retval);
|
||||
}
|
||||
svc_debug_print("calling verstage_mainboard_early_init\n");
|
||||
|
||||
verstage_mainboard_early_init();
|
||||
|
||||
svc_write_postcode(POSTCODE_LATE_INIT);
|
||||
fch_io_enable_legacy_io();
|
||||
verstage_soc_init();
|
||||
verstage_mainboard_init();
|
||||
|
||||
post_code(POSTCODE_VERSTAGE_MAIN);
|
||||
|
||||
vboot_run_logic();
|
||||
|
||||
ctx = vboot_get_context();
|
||||
retval = check_cmos_recovery();
|
||||
if (retval)
|
||||
reboot_into_recovery(ctx, retval);
|
||||
|
||||
post_code(POSTCODE_UPDATE_BOOT_REGION);
|
||||
retval = update_boot_region(ctx);
|
||||
if (retval)
|
||||
reboot_into_recovery(ctx, retval);
|
||||
|
||||
post_code(POSTCODE_SAVE_BUFFERS);
|
||||
retval = save_buffers(&ctx);
|
||||
if (retval)
|
||||
reboot_into_recovery(ctx, retval);
|
||||
|
||||
|
||||
post_code(POSTCODE_UNMAP_SPI_ROM);
|
||||
if (boot_dev.base) {
|
||||
if (svc_unmap_spi_rom((void *)boot_dev.base))
|
||||
printk(BIOS_ERR, "Error unmapping SPI rom\n");
|
||||
}
|
||||
|
||||
post_code(POSTCODE_UNMAP_FCH_DEVICES);
|
||||
unmap_fch_devices();
|
||||
|
||||
post_code(POSTCODE_LEAVING_VERSTAGE);
|
||||
|
||||
printk(BIOS_DEBUG, "Leaving verstage on PSP\n");
|
||||
svc_exit(retval);
|
||||
}
|
||||
|
||||
const struct region_device *boot_device_ro(void)
|
||||
{
|
||||
uintptr_t *addr;
|
||||
|
||||
addr = map_spi_rom();
|
||||
mem_region_device_ro_init(&boot_dev, (void *)addr, CONFIG_ROM_SIZE);
|
||||
|
||||
return &boot_dev.rdev;
|
||||
}
|
||||
|
||||
/*
|
||||
* The stage_entry function is not used directly, but stage_entry() is marked as an entry
|
||||
* point in arm/arch/header.h, so if stage_entry() isn't present and calling Main(), all
|
||||
* the verstage code gets dropped by the linker. Slightly hacky, but mostly harmless.
|
||||
*/
|
||||
void stage_entry(uintptr_t stage_arg)
|
||||
{
|
||||
Main();
|
||||
}
|
||||
@@ -1,59 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#ifndef PSP_VERSTAGE_H
|
||||
#define PSP_VERSTAGE_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <soc/psp_transfer.h>
|
||||
|
||||
#define EMBEDDED_FW_SIGNATURE 0x55aa55aa
|
||||
#define PSP_COOKIE 0x50535024 /* 'PSP$' */
|
||||
#define BDT1_COOKIE 0x44484224 /* 'DHB$ */
|
||||
|
||||
#define PSP_VBOOT_ERROR_SUBCODE 0x0D5D0000
|
||||
|
||||
#define POSTCODE_ENTERED_PSP_VERSTAGE 0x00
|
||||
#define POSTCODE_CONSOLE_INIT 0x01
|
||||
#define POSTCODE_EARLY_INIT 0x02
|
||||
#define POSTCODE_LATE_INIT 0x03
|
||||
#define POSTCODE_VERSTAGE_MAIN 0x04
|
||||
|
||||
#define POSTCODE_SAVE_BUFFERS 0x0E
|
||||
#define POSTCODE_UPDATE_BOOT_REGION 0x0F
|
||||
|
||||
#define POSTCODE_DEFAULT_BUFFER_SIZE_NOTICE 0xC0
|
||||
#define POSTCODE_WORKBUF_RESIZE_WARNING 0xC1
|
||||
#define POSTCODE_WORKBUF_SAVE_ERROR 0xC2
|
||||
#define POSTCODE_WORKBUF_BUFFER_SIZE_ERROR 0xC3
|
||||
#define POSTCODE_ROMSIG_MISMATCH_ERROR 0xC4
|
||||
#define POSTCODE_PSP_COOKIE_MISMATCH_ERROR 0xC5
|
||||
#define POSTCODE_BDT1_COOKIE_MISMATCH_ERROR 0xC6
|
||||
#define POSTCODE_UPDATE_PSP_BIOS_DIR_ERROR 0xC7
|
||||
#define POSTCODE_FMAP_REGION_MISSING 0xC8
|
||||
#define POSTCODE_AMD_FW_MISSING 0xC9
|
||||
#define POSTCODE_CMOS_RECOVERY 0xCA
|
||||
|
||||
#define POSTCODE_UNMAP_SPI_ROM 0xF0
|
||||
#define POSTCODE_UNMAP_FCH_DEVICES 0xF1
|
||||
#define POSTCODE_LEAVING_VERSTAGE 0xF2
|
||||
|
||||
#define SPI_ADDR_MASK 0x00ffffff
|
||||
#define MIN_TRANSFER_BUFFER_SIZE (8 * KiB)
|
||||
#define MIN_WORKBUF_TRANSFER_SIZE (MIN_TRANSFER_BUFFER_SIZE - TRANSFER_INFO_SIZE)
|
||||
|
||||
struct psp_ef_table {
|
||||
uint32_t signature; /* 0x55aa55aa */
|
||||
uint32_t reserved0[4];
|
||||
uint32_t psp_table;
|
||||
uint32_t bios0_entry;
|
||||
uint32_t bios1_entry;
|
||||
uint32_t bios2_entry;
|
||||
} __attribute__((packed, aligned(16)));
|
||||
|
||||
void test_svc_calls(void);
|
||||
uint32_t unmap_fch_devices(void);
|
||||
uint32_t verstage_soc_early_init(void);
|
||||
void verstage_soc_init(void);
|
||||
uintptr_t *map_spi_rom(void);
|
||||
|
||||
#endif /* PSP_VERSTAGE_H */
|
||||
@@ -1,11 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#include <bl_uapp/bl_syscall_public.h>
|
||||
#include <console/console.h>
|
||||
#include <reset.h>
|
||||
|
||||
void do_board_reset(void)
|
||||
{
|
||||
printk(BIOS_ERR, "Resetting the board now.\n");
|
||||
svc_reset_system(RESET_TYPE_COLD);
|
||||
}
|
||||
@@ -1,166 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#include "svc.h"
|
||||
|
||||
#include <assert.h>
|
||||
#include <bl_uapp/bl_syscall_public.h>
|
||||
#include <stddef.h>
|
||||
|
||||
void svc_exit(uint32_t status)
|
||||
{
|
||||
uint32_t unused = 0;
|
||||
SVC_CALL0(SVC_EXIT, unused);
|
||||
}
|
||||
|
||||
uint32_t svc_map_user_stack(void *start_addr, void *end_addr, void *stack_va)
|
||||
{
|
||||
uint32_t retval = 0;
|
||||
SVC_CALL3(SVC_MAP_USER_STACK, (uint32_t)start_addr,
|
||||
(uint32_t)end_addr, stack_va, retval);
|
||||
return retval;
|
||||
}
|
||||
|
||||
void svc_debug_print(const char *string)
|
||||
{
|
||||
uint32_t unused = 0;
|
||||
SVC_CALL1(SVC_DEBUG_PRINT, (uint32_t)string, unused);
|
||||
}
|
||||
|
||||
void svc_debug_print_ex(uint32_t dword0,
|
||||
uint32_t dword1, uint32_t dword2, uint32_t dword3)
|
||||
{
|
||||
uint32_t unused = 0;
|
||||
SVC_CALL4(SVC_DEBUG_PRINT_EX, dword0, dword1, dword2, dword3, unused);
|
||||
}
|
||||
|
||||
uint32_t svc_wait_10ns_multiple(uint32_t multiple)
|
||||
{
|
||||
uint32_t retval = 0;
|
||||
SVC_CALL1(SVC_WAIT_10NS_MULTIPLE, multiple, retval);
|
||||
return retval;
|
||||
}
|
||||
|
||||
uint32_t svc_get_boot_mode(uint32_t *boot_mode)
|
||||
{
|
||||
uint32_t retval = 0;
|
||||
SVC_CALL1(SVC_GET_BOOT_MODE, boot_mode, retval);
|
||||
return retval;
|
||||
}
|
||||
|
||||
void svc_delay_in_usec(uint32_t delay)
|
||||
{
|
||||
uint32_t unused = 0;
|
||||
SVC_CALL1(SVC_DELAY_IN_MICRO_SECONDS, delay, unused);
|
||||
}
|
||||
|
||||
uint32_t svc_get_spi_rom_info(struct spirom_info *spi_rom_info)
|
||||
{
|
||||
uint32_t retval = 0;
|
||||
SVC_CALL1(SVC_GET_SPI_INFO, (uint32_t)spi_rom_info, retval);
|
||||
return retval;
|
||||
}
|
||||
|
||||
uint32_t svc_map_fch_dev(enum fch_io_device io_device,
|
||||
uint32_t arg1, uint32_t arg2, void **io_device_axi_addr)
|
||||
{
|
||||
uint32_t retval = 0;
|
||||
assert(io_device < FCH_IO_DEVICE_END);
|
||||
SVC_CALL4(SVC_MAP_FCH_IO_DEVICE, io_device, arg1, arg2,
|
||||
(uint32_t)io_device_axi_addr, retval);
|
||||
return retval;
|
||||
}
|
||||
|
||||
uint32_t svc_unmap_fch_dev(enum fch_io_device io_device, void *io_device_axi_addr)
|
||||
{
|
||||
uint32_t retval = 0;
|
||||
assert(io_device < FCH_IO_DEVICE_END);
|
||||
SVC_CALL2(SVC_UNMAP_FCH_IO_DEVICE, (uint32_t)io_device,
|
||||
(uint32_t)io_device_axi_addr, retval);
|
||||
return retval;
|
||||
}
|
||||
|
||||
uint32_t svc_map_spi_rom(void *spi_rom_addr,
|
||||
uint32_t size, void **spi_rom_axi_addr)
|
||||
{
|
||||
uint32_t retval = 0;
|
||||
SVC_CALL3(SVC_MAP_SPIROM_DEVICE, spi_rom_addr, size,
|
||||
(uint32_t)spi_rom_axi_addr, retval);
|
||||
return retval;
|
||||
}
|
||||
|
||||
uint32_t svc_unmap_spi_rom(void *spi_rom_addr)
|
||||
{
|
||||
uint32_t retval = 0;
|
||||
SVC_CALL1(SVC_UNMAP_SPIROM_DEVICE, (uint32_t)spi_rom_addr, retval);
|
||||
return retval;
|
||||
}
|
||||
|
||||
uint32_t svc_update_psp_bios_dir(uint32_t *psp_dir_offset,
|
||||
uint32_t *bios_dir_offset, enum dir_offset_operation operation)
|
||||
{
|
||||
uint32_t retval = 0;
|
||||
assert(operation < DIR_OFFSET_OPERATION_MAX);
|
||||
SVC_CALL3(SVC_UPDATE_PSP_BIOS_DIR, (uint32_t)psp_dir_offset,
|
||||
(uint32_t)bios_dir_offset, operation, retval);
|
||||
return retval;
|
||||
}
|
||||
|
||||
uint32_t svc_save_uapp_data(enum uapp_copybuf type, void *address,
|
||||
uint32_t size)
|
||||
{
|
||||
uint32_t retval = 0;
|
||||
assert(type < UAPP_COPYBUF_MAX);
|
||||
SVC_CALL3(SVC_COPY_DATA_FROM_UAPP, type, (uint32_t)address, size, retval);
|
||||
return retval;
|
||||
}
|
||||
|
||||
uint32_t svc_read_timer_val(enum psp_timer_type type, uint64_t *counter_value)
|
||||
{
|
||||
unsigned int retval = 0;
|
||||
assert(type < PSP_TIMER_TYPE_MAX);
|
||||
SVC_CALL2(SVC_READ_TIMER_VAL, type, counter_value, retval);
|
||||
return retval;
|
||||
}
|
||||
|
||||
uint32_t svc_reset_system(enum reset_type reset_type)
|
||||
{
|
||||
unsigned int retval = 0;
|
||||
assert(reset_type < RESET_TYPE_MAX);
|
||||
SVC_CALL1(SVC_RESET_SYSTEM, reset_type, retval);
|
||||
return retval;
|
||||
}
|
||||
|
||||
uint32_t svc_write_postcode(uint32_t postcode)
|
||||
{
|
||||
uint32_t retval = 0;
|
||||
SVC_CALL1(SVC_WRITE_POSTCODE, postcode, retval);
|
||||
return retval;
|
||||
}
|
||||
|
||||
uint32_t svc_get_max_workbuf_size(uint32_t *size)
|
||||
{
|
||||
uint32_t retval = 0;
|
||||
SVC_CALL1(SVC_GET_MAX_WORKBUF_SIZE, size, retval);
|
||||
return retval;
|
||||
}
|
||||
|
||||
uint32_t svc_crypto_sha(struct sha_generic_data *sha_op, enum sha_operation_mode sha_mode)
|
||||
{
|
||||
uint32_t retval = 0;
|
||||
SVC_CALL2(SVC_SHA, sha_op, sha_mode, retval);
|
||||
return retval;
|
||||
}
|
||||
|
||||
uint32_t svc_rsa_pkcs_verify(const struct rsapkcs_verify_params *rsa_params)
|
||||
{
|
||||
uint32_t retval = 0;
|
||||
SVC_CALL1(SVC_RSAPKCS_VERIFY, rsa_params, retval);
|
||||
return retval;
|
||||
}
|
||||
|
||||
uint32_t svc_modexp(struct mod_exp_params *mod_exp_param)
|
||||
{
|
||||
uint32_t retval = 0;
|
||||
SVC_CALL1(SVC_MODEXP, mod_exp_param, retval);
|
||||
return retval;
|
||||
}
|
||||
@@ -1,57 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#ifndef PSP_VERSTAGE_SVC_H
|
||||
#define PSP_VERSTAGE_SVC_H
|
||||
|
||||
#define SVC_CALL4(SVC_ID, R0, R1, R2, R3, Ret) \
|
||||
__asm__ __volatile__ ( \
|
||||
"mov r0, %[reg0]\n\t" \
|
||||
"mov r1, %[reg1]\n\t" \
|
||||
"mov r2, %[reg2]\n\t" \
|
||||
"mov r3, %[reg3]\n\t" \
|
||||
"svc %[id]\n\t" \
|
||||
"mov %[result], r0\n\t" \
|
||||
: [result] "=r" (Ret) /* output */ \
|
||||
: [id] "i" (SVC_ID), [reg0] "r" (R0), [reg1] "r" (R1), [reg2] "r" (R2), \
|
||||
[reg3] "r" (R3) /* input(s) */ \
|
||||
: "r0", "r1", "r2", "r3", "memory", "cc" /* list of clobbered registers */);
|
||||
|
||||
#define SVC_CALL3(SVC_ID, R0, R1, R2, Ret) \
|
||||
__asm__ __volatile__ ( \
|
||||
"mov r0, %[reg0]\n\t" \
|
||||
"mov r1, %[reg1]\n\t" \
|
||||
"mov r2, %[reg2]\n\t" \
|
||||
"svc %[id]\n\t" \
|
||||
"mov %[result], r0\n\t" \
|
||||
: [result] "=r" (Ret) /* output */ \
|
||||
: [id] "i" (SVC_ID), [reg0] "r" (R0), [reg1] "r" (R1), [reg2] "r" (R2) \
|
||||
: "r0", "r1", "r2", "memory", "cc" /* list of clobbered registers */);
|
||||
|
||||
#define SVC_CALL2(SVC_ID, R0, R1, Ret) \
|
||||
__asm__ __volatile__ ( \
|
||||
"mov r0, %[reg0]\n\t" \
|
||||
"mov r1, %[reg1]\n\t" \
|
||||
"svc %[id]\n\t" \
|
||||
"mov %[result], r0\n\t" \
|
||||
: [result] "=r" (Ret) /* output */ \
|
||||
: [id] "i" (SVC_ID), [reg0] "r" (R0), [reg1] "r" (R1)/* input(s) */ \
|
||||
: "r0", "r1", "memory", "cc" /* list of clobbered registers */);
|
||||
|
||||
#define SVC_CALL1(SVC_ID, R0, Ret) \
|
||||
__asm__ __volatile__ ( \
|
||||
"mov r0, %[reg0]\n\t" \
|
||||
"svc %[id]\n\t" \
|
||||
"mov %[result], r0\n\t" \
|
||||
: [result] "=r" (Ret) /* output */ \
|
||||
: [id] "i" (SVC_ID), [reg0] "r" (R0) /* input(s) */ \
|
||||
: "r0", "memory", "cc" /* list of clobbered registers */);
|
||||
|
||||
#define SVC_CALL0(SVC_ID, Ret) \
|
||||
__asm__ __volatile__ ( \
|
||||
"svc %[id]\n\t" \
|
||||
"mov %[result], r0\n\t" \
|
||||
: [result] "=r" (Ret) /* output */ \
|
||||
: [id] "I" (SVC_ID) /* input(s) */ \
|
||||
: "memory", "cc" /* list of clobbered registers */);
|
||||
|
||||
#endif /* PSP_VERSTAGE_SVC_H */
|
||||
@@ -1,15 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#include <bl_uapp/bl_syscall_public.h>
|
||||
#include <stdint.h>
|
||||
#include <timer.h>
|
||||
|
||||
void timer_monotonic_get(struct mono_time *mt)
|
||||
{
|
||||
/* Chrono timer is based on a 25MHz clock */
|
||||
uint64_t clk;
|
||||
|
||||
svc_read_timer_val(PSP_TIMER_TYPE_CHRONO, &clk);
|
||||
|
||||
mt->microseconds = clk / 25;
|
||||
}
|
||||
@@ -1,153 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#include <2crypto.h>
|
||||
#include <2return_codes.h>
|
||||
#include <bl_uapp/bl_syscall_public.h>
|
||||
#include <commonlib/bsd/helpers.h>
|
||||
#include <console/console.h>
|
||||
#include "psp_verstage.h"
|
||||
#include <stddef.h>
|
||||
#include <string.h>
|
||||
#include <swab.h>
|
||||
#include <vb2_api.h>
|
||||
|
||||
static struct sha_generic_data sha_op;
|
||||
static uint32_t sha_op_size_remaining;
|
||||
static uint8_t __attribute__((aligned(32))) sha_hash[64];
|
||||
|
||||
vb2_error_t vb2ex_hwcrypto_digest_init(enum vb2_hash_algorithm hash_alg, uint32_t data_size)
|
||||
{
|
||||
printk(BIOS_DEBUG, "Calculating hash of %d bytes\n", data_size);
|
||||
|
||||
sha_op_size_remaining = data_size;
|
||||
|
||||
if (hash_alg == VB2_HASH_SHA256) {
|
||||
sha_op.SHAType = SHA_TYPE_256;
|
||||
sha_op.DigestLen = 32;
|
||||
} else if (hash_alg == VB2_HASH_SHA512) {
|
||||
sha_op.SHAType = SHA_TYPE_512;
|
||||
sha_op.DigestLen = 64;
|
||||
} else {
|
||||
printk(BIOS_INFO, "Unsupported hash_alg %d!\n", hash_alg);
|
||||
return VB2_ERROR_EX_HWCRYPTO_UNSUPPORTED;
|
||||
}
|
||||
|
||||
/* Set init flag for first operation */
|
||||
sha_op.Init = 1;
|
||||
|
||||
/* Clear eom flag until last operation */
|
||||
sha_op.Eom = 0;
|
||||
|
||||
/* Need documentation on this b:157610147 */
|
||||
sha_op.DataMemType = 2;
|
||||
|
||||
sha_op.Digest = sha_hash;
|
||||
|
||||
sha_op.IntermediateDigest = NULL;
|
||||
|
||||
sha_op.IntermediateMsgLen = 0;
|
||||
|
||||
return VB2_SUCCESS;
|
||||
}
|
||||
|
||||
vb2_error_t vb2ex_hwcrypto_digest_extend(const uint8_t *buf, uint32_t size)
|
||||
{
|
||||
uint32_t retval;
|
||||
sha_op.Data = (uint8_t *) buf;
|
||||
|
||||
if (!sha_op_size_remaining) {
|
||||
printk(BIOS_ERR, "ERROR: got more data than expected.\n");
|
||||
return VB2_ERROR_UNKNOWN;
|
||||
}
|
||||
|
||||
while (size) {
|
||||
sha_op.DataLen = size;
|
||||
|
||||
sha_op_size_remaining -= sha_op.DataLen;
|
||||
|
||||
/* Set eom flag for final operation */
|
||||
if (sha_op_size_remaining == 0)
|
||||
sha_op.Eom = 1;
|
||||
|
||||
retval = svc_crypto_sha(&sha_op, SHA_GENERIC);
|
||||
if (retval) {
|
||||
printk(BIOS_ERR, "ERROR: HW crypto failed - errorcode: %#x\n",
|
||||
retval);
|
||||
return VB2_ERROR_UNKNOWN;
|
||||
}
|
||||
|
||||
/* Clear init flag after first operation */
|
||||
if (sha_op.Init == 1)
|
||||
sha_op.Init = 0;
|
||||
|
||||
size -= sha_op.DataLen;
|
||||
}
|
||||
|
||||
return VB2_SUCCESS;
|
||||
}
|
||||
|
||||
/* Copy the hash back to verstage */
|
||||
vb2_error_t vb2ex_hwcrypto_digest_finalize(uint8_t *digest, uint32_t digest_size)
|
||||
{
|
||||
if (sha_op.Eom == 0) {
|
||||
printk(BIOS_ERR, "ERROR: Got less data than expected.\n");
|
||||
return VB2_ERROR_UNKNOWN;
|
||||
}
|
||||
|
||||
if (digest_size != sha_op.DigestLen) {
|
||||
printk(BIOS_ERR, "ERROR: Digest size does not match expected length.\n");
|
||||
return VB2_ERROR_UNKNOWN;
|
||||
}
|
||||
|
||||
memcpy(digest, sha_hash, digest_size);
|
||||
|
||||
return VB2_SUCCESS;
|
||||
}
|
||||
|
||||
vb2_error_t vb2ex_hwcrypto_modexp(const struct vb2_public_key *key,
|
||||
uint8_t *inout,
|
||||
uint32_t *workbuf32, int exp)
|
||||
{
|
||||
/* workbuf32 is guaranteed to be a length of
|
||||
* 3 * key->arrsize * sizeof(uint32_t).
|
||||
* Since PSP expects everything in LE and *inout is BE array,
|
||||
* we'll use workbuf for temporary buffer for endian conversion.
|
||||
*/
|
||||
struct mod_exp_params mod_exp_param;
|
||||
unsigned int key_bytes = key->arrsize * sizeof(uint32_t);
|
||||
uint32_t *sig_swapped = workbuf32;
|
||||
uint32_t *output_buffer = &workbuf32[key->arrsize];
|
||||
uint32_t *inout_32 = (uint32_t *)inout;
|
||||
uint32_t retval;
|
||||
uint32_t i;
|
||||
|
||||
/* PSP only supports 2K and 4K moduli */
|
||||
if (key->sig_alg != VB2_SIG_RSA2048 &&
|
||||
key->sig_alg != VB2_SIG_RSA2048_EXP3 &&
|
||||
key->sig_alg != VB2_SIG_RSA4096) {
|
||||
return VB2_ERROR_EX_HWCRYPTO_UNSUPPORTED;
|
||||
}
|
||||
|
||||
for (i = 0; i < key->arrsize; i++)
|
||||
sig_swapped[i] = swab32(inout_32[key->arrsize - i - 1]);
|
||||
|
||||
mod_exp_param.pExponent = (char *)&exp;
|
||||
mod_exp_param.ExpSize = sizeof(exp);
|
||||
mod_exp_param.pModulus = (char *)key->n;
|
||||
mod_exp_param.ModulusSize = key_bytes;
|
||||
mod_exp_param.pMessage = (char *)sig_swapped;
|
||||
mod_exp_param.pOutput = (char *)output_buffer;
|
||||
|
||||
retval = svc_modexp(&mod_exp_param);
|
||||
if (retval) {
|
||||
printk(BIOS_ERR, "ERROR: HW crypto failed - errorcode: %#x\n",
|
||||
retval);
|
||||
return VB2_ERROR_EX_HWCRYPTO_UNSUPPORTED;
|
||||
}
|
||||
|
||||
/* vboot expects results in *inout with BE, so copy & convert. */
|
||||
for (i = 0; i < key->arrsize; i++)
|
||||
inout_32[i] = swab32(output_buffer[key->arrsize - i - 1]);
|
||||
|
||||
return VB2_SUCCESS;
|
||||
}
|
||||
Reference in New Issue
Block a user