rockchip/rk3399: Remove unused variable
The 'speed' variable isn't being used after refactoring. Change-Id: Id27a920c61b2bba18d391a7bfefe570235402dec Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/15749 Tested-by: build bot (Jenkins) Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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		@@ -313,7 +313,6 @@ static void phy_io_config(u32 channel,
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	u32 *denali_phy = rk3399_ddr_publ[channel]->denali_phy;
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						u32 *denali_phy = rk3399_ddr_publ[channel]->denali_phy;
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	u32 vref_mode, vref_value;
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						u32 vref_mode, vref_value;
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	u32 mode_sel = 0;
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						u32 mode_sel = 0;
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	u32 speed;
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	u32 reg_value;
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						u32 reg_value;
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	/* vref setting */
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						/* vref setting */
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@@ -363,15 +362,6 @@ static void phy_io_config(u32 channel,
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	/* PHY_939 PHY_PAD_CS_DRIVE */
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						/* PHY_939 PHY_PAD_CS_DRIVE */
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	clrsetbits_le32(&denali_phy[939], 0x7 << 14, mode_sel << 14);
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						clrsetbits_le32(&denali_phy[939], 0x7 << 14, mode_sel << 14);
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	if (sdram_params->ddr_freq < 400 * MHz)
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		speed = 0x0;
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	else if (sdram_params->ddr_freq < 800 * MHz)
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		speed = 0x1;
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	else if (sdram_params->ddr_freq < 1200 * MHz)
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		speed = 0x2;
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	else
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		die("Halting: Unknown DRAM speed.\n");
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	/* PHY_924 PHY_PAD_FDBK_DRIVE */
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						/* PHY_924 PHY_PAD_FDBK_DRIVE */
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	clrsetbits_le32(&denali_phy[924], 0x3 << 21, mode_sel << 21);
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						clrsetbits_le32(&denali_phy[924], 0x3 << 21, mode_sel << 21);
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	/* PHY_926 PHY_PAD_DATA_DRIVE */
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						/* PHY_926 PHY_PAD_DATA_DRIVE */
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