skylake: fix serial port with new code base
Many Kconfig options changed in coreboot.org since skylake was first started. Fix Kconfig option name changes, and also provide a common option, UART_DEBUG that can be selected to select all the necessary options. Note: It's still a requirement to manually unset the 8250IO option because that's unconditionally set. BUG=chrome-os-partner:43419 BUG=chrome-os-partner:43463 BRANCH=None TEST=Built glados. Booted into kernel. Kernel reboots somewhere. Original-Change-Id: I9e6549ea0f1d6b9ffe64a73856ec87b5bc7b7091 Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/289951 Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Change-Id: I0e6b492d7279cc35d4fb3ac17fd727177adce39d Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11172 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -18,11 +18,11 @@
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* Foundation, Inc.
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*/
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#include <console/uart.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <stdlib.h>
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#include <soc/iomap.h>
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#include <soc/pci_devs.h>
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#include <soc/ramstage.h>
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@ -36,10 +36,11 @@ static void pch_uart_read_resources(struct device *dev)
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pci_dev_read_resources(dev);
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/* Set the configured UART base address for the debug port */
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if (IS_ENABLED(CONFIG_CONSOLE_SERIAL8250MEM_32) &&
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pch_uart_is_debug(dev)) {
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if (IS_ENABLED(CONFIG_UART_DEBUG) && pch_uart_is_debug(dev)) {
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struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0);
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res->size = 0x1000;
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/* Need to set the base and size for the resource allocator. */
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res->base = UART_DEBUG_BASE_ADDRESS;
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res->size = UART_DEBUG_BASE_SIZE;
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res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED |
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IORESOURCE_FIXED;
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}
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