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sb/amd/*/*/acpi: Reduce stylistic differences

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Change-Id: I1375b1d18113000b31266030fd7115e23d7cce5f
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61875
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@tutanota.com>
This commit is contained in:
Elyes Haouas
2022-02-11 21:51:23 +01:00
committed by Martin L Roth
parent 9ca1ef96ae
commit e37806766f
5 changed files with 23 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/southbridge/amd/agesa/hudson/acpi/AmdImc.asl
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@@ -20,7 +20,7 @@ Method(WACK, 0)
{ {
Local0 = 0 Local0 = 0
Local1 = 50 Local1 = 50
While ((Local0 != 0xFA) && (Local1 > 0)) { While ((Local0 != 0xfa) && (Local1 > 0)) {
Local0 = MRG0 Local0 = MRG0
Sleep(10) Sleep(10)
Local1-- Local1--

2
src/southbridge/amd/cimx/sb800/acpi/audio.asl
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@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
Device(AZHD) { Device(AZHD) { /* 0:14.2 - HD Audio */
Name(_ADR, 0x00140002) Name(_ADR, 0x00140002)
OperationRegion(AZPD, PCI_Config, 0x00, 0x100) OperationRegion(AZPD, PCI_Config, 0x00, 0x100)
Field(AZPD, AnyAcc, NoLock, Preserve) { Field(AZPD, AnyAcc, NoLock, Preserve) {

28
src/southbridge/amd/cimx/sb800/acpi/fch.asl
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@@ -115,13 +115,13 @@ Method(_CRS, 0) {
CreateDWordField(CRES, ^MMIO._LEN, MM1L) CreateDWordField(CRES, ^MMIO._LEN, MM1L)
/* /*
* Declare memory between TOM1 and 4GB as available * Declare memory between TOM1 and 4GB as available
* for PCI MMIO. * for PCI MMIO.
* Use ShiftLeft to avoid 64bit constant (for XP). * Use ShiftLeft to avoid 64bit constant (for XP).
* This will work even if the OS does 32bit arithmetic, as * This will work even if the OS does 32bit arithmetic, as
* 32bit (0x00000000 - TOM1) will wrap and give the same * 32bit (0x00000000 - TOM1) will wrap and give the same
* result as 64bit (0x100000000 - TOM1). * result as 64bit (0x100000000 - TOM1).
*/ */
MM1B = TOM1 MM1B = TOM1
Local0 = 0x10000000 << 4 Local0 = 0x10000000 << 4
Local0 -= TOM1 Local0 -= TOM1
@@ -131,13 +131,13 @@ Method(_CRS, 0) {
} /* end of Method(_SB.PCI0._CRS) */ } /* end of Method(_SB.PCI0._CRS) */
/* /*
* *
* FIRST METHOD CALLED UPON BOOT * FIRST METHOD CALLED UPON BOOT
* *
* 1. If debugging, print current OS and ACPI interpreter. * 1. If debugging, print current OS and ACPI interpreter.
* 2. Get PCI Interrupt routing from ACPI VSM, this * 2. Get PCI Interrupt routing from ACPI VSM, this
* value is based on user choice in BIOS setup. * value is based on user choice in BIOS setup.
*/ */
Method(_INI, 0) { Method(_INI, 0) {
/* DBGO("\\_SB\\_INI\n") */ /* DBGO("\\_SB\\_INI\n") */
/* DBGO(" DSDT.ASL code from ") */ /* DBGO(" DSDT.ASL code from ") */

1
src/southbridge/amd/cimx/sb800/acpi/lpc.asl
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@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
/* 0:14.3 - LPC */
Device(LIBR) { Device(LIBR) {
Name(_ADR, 0x00140003) Name(_ADR, 0x00140003)

6
src/southbridge/amd/cimx/sb800/acpi/usb.asl
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@@ -1,30 +1,36 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
/* 0:12.0 - OHCI */
Device(UOH1) { Device(UOH1) {
Name(_ADR, 0x00120000) Name(_ADR, 0x00120000)
Name(_PRW, Package() {0x0B, 3}) Name(_PRW, Package() {0x0B, 3})
} /* end UOH1 */ } /* end UOH1 */
/* 0:12.2 - EHCI */
Device(UOH2) { Device(UOH2) {
Name(_ADR, 0x00120002) Name(_ADR, 0x00120002)
Name(_PRW, Package() {0x0B, 3}) Name(_PRW, Package() {0x0B, 3})
} /* end UOH2 */ } /* end UOH2 */
/* 0:13.0 - OHCI */
Device(UOH3) { Device(UOH3) {
Name(_ADR, 0x00130000) Name(_ADR, 0x00130000)
Name(_PRW, Package() {0x0B, 3}) Name(_PRW, Package() {0x0B, 3})
} /* end UOH3 */ } /* end UOH3 */
/* 0:13.2 - EHCI */
Device(UOH4) { Device(UOH4) {
Name(_ADR, 0x00130002) Name(_ADR, 0x00130002)
Name(_PRW, Package() {0x0B, 3}) Name(_PRW, Package() {0x0B, 3})
} /* end UOH4 */ } /* end UOH4 */
/* 0:16.0 - OHCI */
Device(UOH5) { Device(UOH5) {
Name(_ADR, 0x00160000) Name(_ADR, 0x00160000)
Name(_PRW, Package() {0x0B, 3}) Name(_PRW, Package() {0x0B, 3})
} /* end UOH5 */ } /* end UOH5 */
/* 0:16.2 - EHCI */
Device(UOH6) { Device(UOH6) {
Name(_ADR, 0x00160002) Name(_ADR, 0x00160002)
Name(_PRW, Package() {0x0B, 3}) Name(_PRW, Package() {0x0B, 3})