intel/cpu: Switch older models to TSC_MONOTONIC_TIMER

The implementation of udelay() with LAPIC timers
existed first, as we did not have calculations
implemented for TSC frequency.

Change-Id: If510bcaadee67e3a5792b3fc7389353b672712f9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34200
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kyösti Mälkki
2019-07-05 18:05:17 +03:00
parent c00e2fb996
commit e39becf521
15 changed files with 15 additions and 160 deletions

View File

@@ -26,12 +26,13 @@ config CPU_SPECIFIC_OPTIONS
select SMP
select MMX
select SSE2
select UDELAY_LAPIC
select UDELAY_TSC
select SUPPORT_CPU_UCODE_IN_CBFS
select MICROCODE_BLOB_NOT_IN_BLOB_REPO
select PARALLEL_CPU_INIT
select TSC_SYNC_MFENCE
select LAPIC_MONOTONIC_TIMER
select TSC_MONOTONIC_TIMER
select TSC_CONSTANT_RATE
select CPU_INTEL_COMMON
select CPU_INTEL_COMMON_TIMEBASE
select NO_SMM

View File

@@ -6,7 +6,9 @@ config CPU_INTEL_MODEL_1067X
select ARCH_RAMSTAGE_X86_32
select SMP
select SSE2
select UDELAY_LAPIC
select UDELAY_TSC
select TSC_CONSTANT_RATE
select TSC_MONOTONIC_TIMER
select TSC_SYNC_MFENCE
select SUPPORT_CPU_UCODE_IN_CBFS
select CPU_INTEL_COMMON

View File

@@ -6,7 +6,9 @@ config CPU_INTEL_MODEL_106CX
select ARCH_RAMSTAGE_X86_32
select SMP
select SSE2
select UDELAY_LAPIC
select UDELAY_TSC
select TSC_CONSTANT_RATE
select TSC_MONOTONIC_TIMER
select SIPI_VECTOR_IN_ROM
select AP_IN_SIPI_WAIT
select TSC_SYNC_MFENCE

View File

@@ -6,7 +6,9 @@ config CPU_INTEL_MODEL_6EX
select ARCH_RAMSTAGE_X86_32
select SMP
select SSE2
select UDELAY_LAPIC
select UDELAY_TSC
select TSC_CONSTANT_RATE
select TSC_MONOTONIC_TIMER
select AP_IN_SIPI_WAIT
select TSC_SYNC_MFENCE
select SUPPORT_CPU_UCODE_IN_CBFS

View File

@@ -6,7 +6,9 @@ config CPU_INTEL_MODEL_6FX
select ARCH_RAMSTAGE_X86_32
select SMP
select SSE2
select UDELAY_LAPIC
select UDELAY_TSC
select TSC_CONSTANT_RATE
select TSC_MONOTONIC_TIMER
select AP_IN_SIPI_WAIT
select TSC_SYNC_MFENCE
select SUPPORT_CPU_UCODE_IN_CBFS