sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

AGESA fam15tn: Use common GetHeapBase()

Browse Source 
Implementation of this function is common for all boards in family,
and also across different families.

Change-Id: I562a132fa6d3ade2700d9a375d7aa21fcf8ea890
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5653
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Kyösti Mälkki 2014-05-02 09:40:04 +03:00 committed by Patrick Georgi
parent 5caa9d9d81
commit e3aef13933
10 changed files with 18 additions and 84 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
src/mainboard/amd/parmer/agesawrapper.c
View File

@ -41,8 +41,6 @@
#include "FchPlatform.h" #include "FchPlatform.h"
#include "Fch.h" #include "Fch.h"
#include <cpu/amd/agesa/s3_resume.h> #include <cpu/amd/agesa/s3_resume.h>
#include <cbmem.h>
#include <arch/acpi.h>
#include <arch/io.h> #include <arch/io.h>
#include <device/device.h> #include <device/device.h>
#include "hudson.h" #include "hudson.h"
@ -248,23 +246,6 @@ agesawrapper_amdinitearly (
return (UINT32)status; return (UINT32)status;
} }
UINT32 GetHeapBase(
AMD_CONFIG_PARAMS *StdHeader
)
{
UINT32 heap;
#if CONFIG_HAVE_ACPI_RESUME
/* Both romstage and ramstage has this S3 detect. */
if (acpi_get_sleep_type() == 3)
heap = (UINT32)cbmem_find(CBMEM_ID_RESUME_SCRATCH) + (CONFIG_HIGH_SCRATCH_MEMORY_SIZE - BIOS_HEAP_SIZE); /* base + high_stack_size */
else
#endif
heap = BIOS_HEAP_START_ADDRESS; /* Low mem */
return heap;
}
UINT32 UINT32
agesawrapper_amdinitpost ( agesawrapper_amdinitpost (
VOID VOID

2
src/mainboard/amd/parmer/agesawrapper.h
View File

@ -92,6 +92,4 @@ UINT32 agesawrapper_amds3laterestore (VOID);
UINT32 agesawrapper_fchs3earlyrestore (VOID); UINT32 agesawrapper_fchs3earlyrestore (VOID);
UINT32 agesawrapper_fchs3laterestore (VOID); UINT32 agesawrapper_fchs3laterestore (VOID);
UINT32 GetHeapBase(AMD_CONFIG_PARAMS *StdHeader);
#endif #endif

19
src/mainboard/amd/thatcher/agesawrapper.c
View File

@ -41,8 +41,6 @@
#include "FchPlatform.h" #include "FchPlatform.h"
#include "Fch.h" #include "Fch.h"
#include <cpu/amd/agesa/s3_resume.h> #include <cpu/amd/agesa/s3_resume.h>
#include <cbmem.h>
#include <arch/acpi.h>
#include <arch/io.h> #include <arch/io.h>
#include <device/device.h> #include <device/device.h>
#include "hudson.h" #include "hudson.h"
@ -246,23 +244,6 @@ agesawrapper_amdinitearly (
return (UINT32)status; return (UINT32)status;
} }
UINT32 GetHeapBase(
AMD_CONFIG_PARAMS *StdHeader
)
{
UINT32 heap;
#if CONFIG_HAVE_ACPI_RESUME
/* Both romstage and ramstage has this S3 detect. */
if (acpi_get_sleep_type() == 3)
heap = (UINT32)cbmem_find(CBMEM_ID_RESUME_SCRATCH) + (CONFIG_HIGH_SCRATCH_MEMORY_SIZE - BIOS_HEAP_SIZE); /* base + high_stack_size */
else
#endif
heap = BIOS_HEAP_START_ADDRESS; /* Low mem */
return heap;
}
UINT32 UINT32
agesawrapper_amdinitpost ( agesawrapper_amdinitpost (
VOID VOID

2
src/mainboard/amd/thatcher/agesawrapper.h
View File

@ -92,6 +92,4 @@ UINT32 agesawrapper_amds3laterestore (VOID);
UINT32 agesawrapper_fchs3earlyrestore (VOID); UINT32 agesawrapper_fchs3earlyrestore (VOID);
UINT32 agesawrapper_fchs3laterestore (VOID); UINT32 agesawrapper_fchs3laterestore (VOID);
UINT32 GetHeapBase(AMD_CONFIG_PARAMS *StdHeader);
#endif #endif

19
src/mainboard/asus/f2a85-m/agesawrapper.c
View File

@ -26,9 +26,7 @@
#include "BiosCallOuts.h" #include "BiosCallOuts.h"
#include "PlatformGnbPcieComplex.h" #include "PlatformGnbPcieComplex.h"
#include <arch/acpi.h>
#include <arch/io.h> #include <arch/io.h>
#include <cbmem.h>
#include <cpu/amd/agesa/s3_resume.h> #include <cpu/amd/agesa/s3_resume.h>
#include <cpu/x86/mtrr.h> #include <cpu/x86/mtrr.h>
#include <device/device.h> #include <device/device.h>
@ -239,23 +237,6 @@ agesawrapper_amdinitearly (
return (UINT32)status; return (UINT32)status;
} }
UINT32 GetHeapBase(
AMD_CONFIG_PARAMS *StdHeader
)
{
UINT32 heap;
#if CONFIG_HAVE_ACPI_RESUME
/* Both romstage and ramstage has this S3 detect. */
if (acpi_get_sleep_type() == 3)
heap = (UINT32)cbmem_find(CBMEM_ID_RESUME_SCRATCH) + (CONFIG_HIGH_SCRATCH_MEMORY_SIZE - BIOS_HEAP_SIZE); /* base + high_stack_size */
else
#endif
heap = BIOS_HEAP_START_ADDRESS; /* Low mem */
return heap;
}
UINT32 UINT32
agesawrapper_amdinitpost ( agesawrapper_amdinitpost (
VOID VOID

2
src/mainboard/asus/f2a85-m/agesawrapper.h
View File

@ -91,6 +91,4 @@ UINT32 agesawrapper_amds3laterestore (VOID);
UINT32 agesawrapper_fchs3earlyrestore (VOID); UINT32 agesawrapper_fchs3earlyrestore (VOID);
UINT32 agesawrapper_fchs3laterestore (VOID); UINT32 agesawrapper_fchs3laterestore (VOID);
UINT32 GetHeapBase(AMD_CONFIG_PARAMS *StdHeader);
#endif #endif

19
src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.c
View File

@ -28,9 +28,7 @@
#define __SIMPLE_DEVICE__ #define __SIMPLE_DEVICE__
#include <arch/acpi.h>
#include <arch/io.h> #include <arch/io.h>
#include <cbmem.h>
#include <cpu/x86/msr.h> #include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h> #include <cpu/x86/mtrr.h>
#include <device/device.h> #include <device/device.h>
@ -230,23 +228,6 @@ agesawrapper_amdinitearly (
return (UINT32)status; return (UINT32)status;
} }
UINT32 GetHeapBase(
AMD_CONFIG_PARAMS *StdHeader
)
{
UINT32 heap;
#if CONFIG_HAVE_ACPI_RESUME
/* Both romstage and ramstage has this S3 detect. */
if (acpi_get_sleep_type() == 3)
heap = (UINT32)cbmem_find(CBMEM_ID_RESUME_SCRATCH) + (CONFIG_HIGH_SCRATCH_MEMORY_SIZE - BIOS_HEAP_SIZE); /* base + high_stack_size */
else
#endif
heap = BIOS_HEAP_START_ADDRESS; /* Low mem */
return heap;
}
UINT32 UINT32
agesawrapper_amdinitpost ( agesawrapper_amdinitpost (
VOID VOID

2
src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.h
View File

@ -91,6 +91,4 @@ UINT32 agesawrapper_amds3laterestore (VOID);
UINT32 agesawrapper_fchs3earlyrestore (VOID); UINT32 agesawrapper_fchs3earlyrestore (VOID);
UINT32 agesawrapper_fchs3laterestore (VOID); UINT32 agesawrapper_fchs3laterestore (VOID);
UINT32 GetHeapBase(AMD_CONFIG_PARAMS *StdHeader);
#endif #endif

16
src/northbridge/amd/agesa/family15tn/fam15tn_callouts.c
View File

@ -27,6 +27,7 @@
#include "dimmSpd.h" #include "dimmSpd.h"
#include "fam15tn_callouts.h" #include "fam15tn_callouts.h"
#include <cbmem.h> #include <cbmem.h>
#include <arch/acpi.h>
#define AGESA_RUNTIME_SIZE 4096 #define AGESA_RUNTIME_SIZE 4096
@ -50,6 +51,21 @@ static AGESA_STATUS alloc_cbmem(AGESA_BUFFER_PARAMS *AllocParams) {
return AGESA_SUCCESS; return AGESA_SUCCESS;
} }
UINT32 GetHeapBase(AMD_CONFIG_PARAMS *StdHeader)
{
UINT32 heap = BIOS_HEAP_START_ADDRESS;
#if CONFIG_HAVE_ACPI_RESUME
/* Both romstage and ramstage has this S3 detect. */
if (acpi_get_sleep_type() == 3)
heap = (UINT32) cbmem_find(CBMEM_ID_RESUME_SCRATCH) +
(CONFIG_HIGH_SCRATCH_MEMORY_SIZE - BIOS_HEAP_SIZE);
/* himem_heap_base + high_stack_size */
#endif
return heap;
}
AGESA_STATUS fam15tn_AllocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr) AGESA_STATUS fam15tn_AllocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
{ {
UINT32 AvailableHeapSize; UINT32 AvailableHeapSize;

2
src/northbridge/amd/agesa/family15tn/fam15tn_callouts.h
View File

@ -39,6 +39,8 @@ typedef struct _BIOS_BUFFER_NODE {
UINT32 NextNodeOffset; UINT32 NextNodeOffset;
} BIOS_BUFFER_NODE; } BIOS_BUFFER_NODE;
UINT32 GetHeapBase(AMD_CONFIG_PARAMS *StdHeader);
AGESA_STATUS fam15tn_AllocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr); AGESA_STATUS fam15tn_AllocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
AGESA_STATUS fam15tn_DeallocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr); AGESA_STATUS fam15tn_DeallocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
AGESA_STATUS fam15tn_LocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr); AGESA_STATUS fam15tn_LocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr);