soc/intel: Add KBL-S MCH and some KBL PCH support

This patch adds the support for KBL-S MCH and Z270, H270, B250 and
Q250 PCH chips.

BUG=None
BRANCH=None
TEST=Boot with KBL-S CPU and B250/H270 PCHs.

Change-Id: If03abb215f225d648505e05274e2f08ff02cebdc
Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com>
Reviewed-on: https://review.coreboot.org/25305
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Naresh Solanki <naresh.solanki@intel.com>
This commit is contained in:
Gaggery Tsai
2018-03-21 22:36:18 +08:00
committed by Patrick Georgi
parent 6dd4f76c77
commit e415a4c355
4 changed files with 15 additions and 0 deletions

View File

@@ -2669,7 +2669,11 @@
#define PCI_DEVICE_ID_INTEL_SPT_H_C236 0xa150
#define PCI_DEVICE_ID_INTEL_SPT_H_PREMIUM 0xa14e
#define PCI_DEVICE_ID_INTEL_SPT_H_QM170 0xa14d
#define PCI_DEVICE_ID_INTEL_KBP_H_H270 0xa2c4
#define PCI_DEVICE_ID_INTEL_KBP_H_Z270 0xa2c5
#define PCI_DEVICE_ID_INTEL_KBP_H_Q270 0xa2c6
#define PCI_DEVICE_ID_INTEL_KBP_H_Q250 0xa2c7
#define PCI_DEVICE_ID_INTEL_KBP_H_B250 0xa2c8
#define PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM_HDCP22 0x9d4b
#define PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM_HDCP22 0x9d4e
#define PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE_HDCP22 0x9d50
@@ -2883,6 +2887,7 @@
#define PCI_DEVICE_ID_INTEL_SKL_ID_Y 0x190c
#define PCI_DEVICE_ID_INTEL_SKL_ID_ULX 0x1924
#define PCI_DEVICE_ID_INTEL_SKL_ID_H 0x1910
#define PCI_DEVICE_ID_INTEL_KBL_ID_S 0x590f
#define PCI_DEVICE_ID_INTEL_SKL_ID_H_EM 0x1918
#define PCI_DEVICE_ID_INTEL_KBL_ID_U 0x5904
#define PCI_DEVICE_ID_INTEL_KBL_ID_Y 0x590c