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mb/intel/dg43gt: Configure clockgen

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This makes the VGA output on the DVI-I connector usable.

This reuses vendor settings.

Change-Id: Ib8b6bf33816f7e468a09ff5e2008c2cb9f7c0a8b
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/21440
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Arthur Heymans 2017-09-07 17:05:57 +02:00
parent 33863b6eff
commit e4188a23dd
2 changed files with 14 additions and 1 deletions
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1
src/mainboard/intel/dg43gt/Kconfig
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@ -32,6 +32,7 @@ config BOARD_SPECIFIC_OPTIONS
select HAVE_ACPI_RESUME
select INTEL_EDID
select MAINBOARD_HAS_NATIVE_VGA_INIT
select DRIVERS_I2C_CK505
config VGA_BIOS_ID
string

14
src/mainboard/intel/dg43gt/devicetree.cb
View File

@ -101,7 +101,19 @@ chip northbridge/intel/x4x # Northbridge
end
device pci 1f.1 on end # PATA/IDE
device pci 1f.2 on end # SATA
device pci 1f.3 on end # SMbus
device pci 1f.3 on # SMbus
chip drivers/i2c/ck505 # SLG8XP549T
register "mask" = "{ 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff,
0xff, 0xff }"
register "regs" = "{ 0x11, 0xd9, 0xff,
0xfd, 0xff, 0x00, 0x00,
0x06, 0x10, 0x05, 0x01,
0x80, 0x0d }"
device i2c 69 on end
end
end
device pci 1f.4 off end
device pci 1f.5 on end # IDE
device pci 1f.6 off end