soc/intel: Use simple PCI config access
Call the simple PCI config accessors directly. Change-Id: I2c6712d836924b01c33a8435292be1ac2e530472 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31749 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -13,31 +13,19 @@
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* GNU General Public License for more details.
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* GNU General Public License for more details.
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*/
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*/
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#include <device/mmio.h>
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#include <stdint.h>
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#include <device/pci_ops.h>
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#include <device/pci_ops.h>
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#include <soc/iosf.h>
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#include <soc/iosf.h>
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#if !defined(__PRE_RAM__)
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static inline void write_iosf_reg(int reg, uint32_t value)
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#define IOSF_PCI_BASE (CONFIG_MMCONF_BASE_ADDRESS + (IOSF_PCI_DEV << 12))
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{
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pci_s_write_config32(IOSF_PCI_DEV, reg, value);
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}
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static inline void write_iosf_reg(int reg, uint32_t value)
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{
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write32((u32 *)(IOSF_PCI_BASE + reg), value);
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}
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static inline uint32_t read_iosf_reg(int reg)
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static inline uint32_t read_iosf_reg(int reg)
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{
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{
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return read32((u32 *)(IOSF_PCI_BASE + reg));
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return pci_s_read_config32(IOSF_PCI_DEV, reg);
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}
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}
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#else
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static inline void write_iosf_reg(int reg, uint32_t value)
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{
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pci_write_config32(IOSF_PCI_DEV, reg, value);
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}
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static inline uint32_t read_iosf_reg(int reg)
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{
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return pci_read_config32(IOSF_PCI_DEV, reg);
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}
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#endif
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/* Common sequences for all the port accesses. */
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/* Common sequences for all the port accesses. */
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static uint32_t iosf_read_port(uint32_t cr, int reg)
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static uint32_t iosf_read_port(uint32_t cr, int reg)
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@ -14,32 +14,20 @@
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* GNU General Public License for more details.
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* GNU General Public License for more details.
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*/
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*/
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#include <device/mmio.h>
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#include <stdint.h>
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#include <device/pci_ops.h>
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#include <device/pci_ops.h>
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#include <console/console.h>
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#include <console/console.h>
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#include <soc/iosf.h>
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#include <soc/iosf.h>
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#if ENV_RAMSTAGE
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static inline void write_iosf_reg(int reg, uint32_t value)
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#define IOSF_PCI_BASE (CONFIG_MMCONF_BASE_ADDRESS + (IOSF_PCI_DEV << 12))
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{
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pci_s_write_config32(IOSF_PCI_DEV, reg, value);
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}
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static inline void write_iosf_reg(int reg, uint32_t value)
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{
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write32((void *)(IOSF_PCI_BASE + reg), value);
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}
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static inline uint32_t read_iosf_reg(int reg)
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static inline uint32_t read_iosf_reg(int reg)
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{
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{
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return read32((void *)(IOSF_PCI_BASE + reg));
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return pci_s_read_config32(IOSF_PCI_DEV, reg);
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}
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}
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#else
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static inline void write_iosf_reg(int reg, uint32_t value)
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{
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pci_write_config32(IOSF_PCI_DEV, reg, value);
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}
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static inline uint32_t read_iosf_reg(int reg)
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{
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return pci_read_config32(IOSF_PCI_DEV, reg);
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}
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#endif /* ENV_RAMSTAGE */
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/* Common sequences for all the port accesses. */
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/* Common sequences for all the port accesses. */
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static uint32_t iosf_read_port(uint32_t cr, int reg)
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static uint32_t iosf_read_port(uint32_t cr, int reg)
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@ -15,31 +15,19 @@
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* GNU General Public License for more details.
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* GNU General Public License for more details.
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*/
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*/
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#include <device/mmio.h>
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#include <stdint.h>
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#include <device/pci_ops.h>
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#include <device/pci_ops.h>
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#include <soc/iosf.h>
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#include <soc/iosf.h>
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#if !defined(__PRE_RAM__)
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static inline void write_iosf_reg(int reg, uint32_t value)
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#define IOSF_PCI_BASE (CONFIG_MMCONF_BASE_ADDRESS + (IOSF_PCI_DEV << 12))
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{
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pci_s_write_config32(IOSF_PCI_DEV, reg, value);
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}
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static inline void write_iosf_reg(int reg, uint32_t value)
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{
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write32((u32 *)(IOSF_PCI_BASE + reg), value);
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}
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static inline uint32_t read_iosf_reg(int reg)
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static inline uint32_t read_iosf_reg(int reg)
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{
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{
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return read32((u32 *)(IOSF_PCI_BASE + reg));
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return pci_s_read_config32(IOSF_PCI_DEV, reg);
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}
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}
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#else
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static inline void write_iosf_reg(int reg, uint32_t value)
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{
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pci_write_config32(IOSF_PCI_DEV, reg, value);
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}
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static inline uint32_t read_iosf_reg(int reg)
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{
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return pci_read_config32(IOSF_PCI_DEV, reg);
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}
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#endif
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/* Common sequences for all the port accesses. */
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/* Common sequences for all the port accesses. */
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static uint32_t iosf_read_port(uint32_t cr, int reg)
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static uint32_t iosf_read_port(uint32_t cr, int reg)
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