vc/amd/fsp/*/platform_descriptor: add dxio_link_hotplug_type enum
Add the dxio_link_hotplug_type enum definition for the link_hotplug field in the DXIO descriptor struct. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ieeb3e3edaed2c689707edc4df7d25c777005fde2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76438 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
@@ -68,6 +68,16 @@ enum dxio_aspm_type {
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ASPM_MAX // Not valid value, used to verify input
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ASPM_MAX // Not valid value, used to verify input
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};
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};
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/* PCIe link hotplug */
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enum dxio_link_hotplug_type {
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HOTPLUG_DISABLED = 0,
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HOTPLUG_BASIC,
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HOTPLUG_SERVER,
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HOTPLUG_ENHANCED,
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HOTPLUG_INBOARD,
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HOTPLUG_SERVER_SSD,
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};
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enum dxio_port_param_type {
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enum dxio_port_param_type {
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PP_DEVICE = 1,
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PP_DEVICE = 1,
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PP_FUNCTION,
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PP_FUNCTION,
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@@ -200,7 +210,7 @@ typedef struct __packed {
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uint32_t link_aspm_L1_1 :1; // En/Dis root port capabilities for L1.1
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uint32_t link_aspm_L1_1 :1; // En/Dis root port capabilities for L1.1
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uint32_t link_aspm_L1_2 :1; // En/Dis root port capabilities for L1.2
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uint32_t link_aspm_L1_2 :1; // En/Dis root port capabilities for L1.2
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uint32_t clk_req :4; // See cpm_clk_req
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uint32_t clk_req :4; // See cpm_clk_req
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uint8_t link_hotplug; // Currently unused by FSP
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uint8_t link_hotplug; // See dxio_link_hotplug_type
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uint8_t slot_power_limit; // Currently unused by FSP
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uint8_t slot_power_limit; // Currently unused by FSP
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uint32_t slot_power_limit_scale :2; // Currently unused by FSP
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uint32_t slot_power_limit_scale :2; // Currently unused by FSP
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uint32_t reserved_4 :6;
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uint32_t reserved_4 :6;
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@@ -72,6 +72,16 @@ enum dxio_aspm_type {
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ASPM_MAX // Not valid value, used to verify input
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ASPM_MAX // Not valid value, used to verify input
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};
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};
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/* PCIe link hotplug */
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enum dxio_link_hotplug_type {
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HOTPLUG_DISABLED = 0,
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HOTPLUG_BASIC,
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HOTPLUG_SERVER,
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HOTPLUG_ENHANCED,
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HOTPLUG_INBOARD,
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HOTPLUG_SERVER_SSD,
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};
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enum dxio_port_param_type {
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enum dxio_port_param_type {
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PP_DEVICE = 1,
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PP_DEVICE = 1,
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PP_FUNCTION,
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PP_FUNCTION,
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@@ -195,7 +205,7 @@ typedef struct __packed {
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uint32_t link_aspm_L1_1 :1; // En/Dis root port capabilities for L1.1
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uint32_t link_aspm_L1_1 :1; // En/Dis root port capabilities for L1.1
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uint32_t link_aspm_L1_2 :1; // En/Dis root port capabilities for L1.2
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uint32_t link_aspm_L1_2 :1; // En/Dis root port capabilities for L1.2
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uint32_t clk_req :4; // See cpm_clk_req
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uint32_t clk_req :4; // See cpm_clk_req
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uint8_t link_hotplug; // Currently unused by FSP
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uint8_t link_hotplug; // See dxio_link_hotplug_type
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uint8_t slot_power_limit; // Currently unused by FSP
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uint8_t slot_power_limit; // Currently unused by FSP
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uint32_t slot_power_limit_scale :2; // Currently unused by FSP
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uint32_t slot_power_limit_scale :2; // Currently unused by FSP
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uint32_t reserved_4 :6;
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uint32_t reserved_4 :6;
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@@ -68,6 +68,16 @@ enum dxio_aspm_type {
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ASPM_MAX // Not valid value, used to verify input
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ASPM_MAX // Not valid value, used to verify input
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};
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};
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/* PCIe link hotplug */
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enum dxio_link_hotplug_type {
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HOTPLUG_DISABLED = 0,
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HOTPLUG_BASIC,
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HOTPLUG_SERVER,
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HOTPLUG_ENHANCED,
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HOTPLUG_INBOARD,
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HOTPLUG_SERVER_SSD,
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};
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enum dxio_port_param_type {
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enum dxio_port_param_type {
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PP_DEVICE = 1,
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PP_DEVICE = 1,
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PP_FUNCTION,
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PP_FUNCTION,
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@@ -222,7 +232,7 @@ typedef struct __packed {
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uint32_t link_aspm_L1_1 :1; // En/Dis root port capabilities for L1.1
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uint32_t link_aspm_L1_1 :1; // En/Dis root port capabilities for L1.1
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uint32_t link_aspm_L1_2 :1; // En/Dis root port capabilities for L1.2
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uint32_t link_aspm_L1_2 :1; // En/Dis root port capabilities for L1.2
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uint32_t clk_req :4; // See cpm_clk_req
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uint32_t clk_req :4; // See cpm_clk_req
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uint8_t link_hotplug; // Currently unused by FSP
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uint8_t link_hotplug; // See dxio_link_hotplug_type
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uint8_t slot_power_limit; // Currently unused by FSP
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uint8_t slot_power_limit; // Currently unused by FSP
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uint32_t slot_power_limit_scale :2; // Currently unused by FSP
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uint32_t slot_power_limit_scale :2; // Currently unused by FSP
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uint32_t reserved_4 :6;
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uint32_t reserved_4 :6;
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@@ -72,6 +72,16 @@ enum dxio_aspm_type {
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ASPM_MAX // Not valid value, used to verify input
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ASPM_MAX // Not valid value, used to verify input
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};
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};
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/* PCIe link hotplug */
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enum dxio_link_hotplug_type {
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HOTPLUG_DISABLED = 0,
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HOTPLUG_BASIC,
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HOTPLUG_SERVER,
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HOTPLUG_ENHANCED,
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HOTPLUG_INBOARD,
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HOTPLUG_SERVER_SSD,
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};
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enum dxio_port_param_type {
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enum dxio_port_param_type {
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PP_DEVICE = 1,
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PP_DEVICE = 1,
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PP_FUNCTION,
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PP_FUNCTION,
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@@ -229,7 +239,7 @@ typedef struct __packed {
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uint32_t link_aspm_L1_1 :1; // En/Dis root port capabilities for L1.1
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uint32_t link_aspm_L1_1 :1; // En/Dis root port capabilities for L1.1
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uint32_t link_aspm_L1_2 :1; // En/Dis root port capabilities for L1.2
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uint32_t link_aspm_L1_2 :1; // En/Dis root port capabilities for L1.2
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uint32_t clk_req :4; // See cpm_clk_req
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uint32_t clk_req :4; // See cpm_clk_req
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uint8_t link_hotplug; // Hotplug control
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uint8_t link_hotplug; // See dxio_link_hotplug_type
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uint8_t slot_power_limit; // PCIe slot power limit
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uint8_t slot_power_limit; // PCIe slot power limit
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uint32_t slot_power_limit_scale :2; // PCIe slot power limit scale
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uint32_t slot_power_limit_scale :2; // PCIe slot power limit scale
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uint32_t :6;
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uint32_t :6;
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@@ -67,6 +67,16 @@ typedef enum {
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ASPM_MAX // Not valid value, used to verify input
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ASPM_MAX // Not valid value, used to verify input
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} dxio_aspm_type;
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} dxio_aspm_type;
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/* PCIe link hotplug */
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enum dxio_link_hotplug_type {
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HOTPLUG_DISABLED = 0,
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HOTPLUG_BASIC,
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HOTPLUG_SERVER,
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HOTPLUG_ENHANCED,
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HOTPLUG_INBOARD,
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HOTPLUG_SERVER_SSD,
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};
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/* DDI Aux channel */
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/* DDI Aux channel */
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typedef enum {
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typedef enum {
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AUX1 = 0,
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AUX1 = 0,
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@@ -173,7 +183,7 @@ typedef struct __packed {
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uint32_t link_aspm_L1_1 :1; // En/Dis root port capabilities for L1.1
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uint32_t link_aspm_L1_1 :1; // En/Dis root port capabilities for L1.1
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uint32_t link_aspm_L1_2 :1; // En/Dis root port capabilities for L1.2
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uint32_t link_aspm_L1_2 :1; // En/Dis root port capabilities for L1.2
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uint32_t clk_req :4; // See cpm_clk_req
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uint32_t clk_req :4; // See cpm_clk_req
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uint8_t link_hotplug; // Currently unused by FSP
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uint8_t link_hotplug; // See dxio_link_hotplug_type
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uint8_t slot_power_limit; // Currently unused by FSP
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uint8_t slot_power_limit; // Currently unused by FSP
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uint32_t slot_power_limit_scale :2; // Currently unused by FSP
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uint32_t slot_power_limit_scale :2; // Currently unused by FSP
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uint32_t reserved_4 :6;
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uint32_t reserved_4 :6;
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