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Split NORTHBRIDGE_INTEL_I945 into more precise _I945GC and _I945GM

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Both chipsets use the src/northbridge/intel/i945 code but that code
needs to know which chipset is actually used. Having separate
NORTHBRIDGE_ options allows the I945GC/I945GM choice to be removed
since code can test the NORTHBRIDGE_ option directly.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5893 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Peter Stuge
2010-10-01 09:13:18 +00:00
committed by Patrick Georgi
parent c2d0bfb470
commit e4bc0f6480
8 changed files with 25 additions and 43 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
src/mainboard/getac/p470/Kconfig
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@@ -23,7 +23,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select ARCH_X86 select ARCH_X86
select CPU_INTEL_CORE select CPU_INTEL_CORE
select CPU_INTEL_SOCKET_MFCPGA478 select CPU_INTEL_SOCKET_MFCPGA478
select NORTHBRIDGE_INTEL_I945 select NORTHBRIDGE_INTEL_I945GM
select SOUTHBRIDGE_INTEL_I82801GX select SOUTHBRIDGE_INTEL_I82801GX
select SOUTHBRIDGE_TI_PCIXX12 select SOUTHBRIDGE_TI_PCIXX12
select SUPERIO_SMSC_FDC37N972 select SUPERIO_SMSC_FDC37N972
@@ -43,7 +43,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select CACHE_AS_RAM select CACHE_AS_RAM
select GFXUMA select GFXUMA
select TINY_BOOTBLOCK select TINY_BOOTBLOCK
select I945GM
select CHANNEL_XOR_RANDOMIZATION select CHANNEL_XOR_RANDOMIZATION
config MAINBOARD_DIR config MAINBOARD_DIR

3
src/mainboard/ibase/mb899/Kconfig
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@@ -5,7 +5,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select ARCH_X86 select ARCH_X86
select CPU_INTEL_CORE select CPU_INTEL_CORE
select CPU_INTEL_SOCKET_MFCPGA478 select CPU_INTEL_SOCKET_MFCPGA478
select NORTHBRIDGE_INTEL_I945 select NORTHBRIDGE_INTEL_I945GM
select SOUTHBRIDGE_INTEL_I82801GX select SOUTHBRIDGE_INTEL_I82801GX
select SUPERIO_WINBOND_W83627EHG select SUPERIO_WINBOND_W83627EHG
select BOARD_HAS_FADT select BOARD_HAS_FADT
@@ -20,7 +20,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select CACHE_AS_RAM select CACHE_AS_RAM
select GFXUMA select GFXUMA
select TINY_BOOTBLOCK select TINY_BOOTBLOCK
select I945GM
select CHANNEL_XOR_RANDOMIZATION select CHANNEL_XOR_RANDOMIZATION
config MAINBOARD_DIR config MAINBOARD_DIR

3
src/mainboard/intel/d945gclf/Kconfig
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@@ -22,7 +22,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y def_bool y
select ARCH_X86 select ARCH_X86
select CPU_INTEL_SOCKET_441 select CPU_INTEL_SOCKET_441
select NORTHBRIDGE_INTEL_I945 select NORTHBRIDGE_INTEL_I945GC
select SOUTHBRIDGE_INTEL_I82801GX select SOUTHBRIDGE_INTEL_I82801GX
select SUPERIO_SMSC_LPC47M15X select SUPERIO_SMSC_LPC47M15X
select BOARD_HAS_FADT select BOARD_HAS_FADT
@@ -40,7 +40,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select BOARD_ROMSIZE_KB_512 select BOARD_ROMSIZE_KB_512
select GFXUMA select GFXUMA
select TINY_BOOTBLOCK select TINY_BOOTBLOCK
select I945GC
select CHANNEL_XOR_RANDOMIZATION select CHANNEL_XOR_RANDOMIZATION
config MAINBOARD_DIR config MAINBOARD_DIR

3
src/mainboard/kontron/986lcd-m/Kconfig
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@@ -5,7 +5,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select ARCH_X86 select ARCH_X86
select CPU_INTEL_CORE select CPU_INTEL_CORE
select CPU_INTEL_SOCKET_MFCPGA478 select CPU_INTEL_SOCKET_MFCPGA478
select NORTHBRIDGE_INTEL_I945 select NORTHBRIDGE_INTEL_I945GM
select SOUTHBRIDGE_INTEL_I82801GX select SOUTHBRIDGE_INTEL_I82801GX
select SUPERIO_WINBOND_W83627THG select SUPERIO_WINBOND_W83627THG
select BOARD_HAS_FADT select BOARD_HAS_FADT
@@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select GFXUMA select GFXUMA
select TINY_BOOTBLOCK select TINY_BOOTBLOCK
select CHANNEL_XOR_RANDOMIZATION select CHANNEL_XOR_RANDOMIZATION
select I945GM
select OVERRIDE_CLOCK_DISABLE select OVERRIDE_CLOCK_DISABLE
config MAINBOARD_DIR config MAINBOARD_DIR

3
src/mainboard/roda/rk886ex/Kconfig
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@@ -5,7 +5,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select ARCH_X86 select ARCH_X86
select CPU_INTEL_CORE select CPU_INTEL_CORE
select CPU_INTEL_SOCKET_MFCPGA478 select CPU_INTEL_SOCKET_MFCPGA478
select NORTHBRIDGE_INTEL_I945 select NORTHBRIDGE_INTEL_I945GM
select SOUTHBRIDGE_INTEL_I82801GX select SOUTHBRIDGE_INTEL_I82801GX
select SOUTHBRIDGE_TI_PCI7420 select SOUTHBRIDGE_TI_PCI7420
select SUPERIO_SMSC_LPC47N227 select SUPERIO_SMSC_LPC47N227
@@ -19,7 +19,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_ACPI_TABLES select HAVE_ACPI_TABLES
select HAVE_ACPI_RESUME select HAVE_ACPI_RESUME
select BOARD_ROMSIZE_KB_1024 select BOARD_ROMSIZE_KB_1024
select I945GM
select CHANNEL_XOR_RANDOMIZATION select CHANNEL_XOR_RANDOMIZATION
config MAINBOARD_DIR config MAINBOARD_DIR

3
src/northbridge/intel/Makefile.inc
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@@ -7,4 +7,5 @@ subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I440LX) += i440lx
subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I82810) += i82810 subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I82810) += i82810
subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I82830) += i82830 subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I82830) += i82830
subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I855) += i855 subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I855) += i855
subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I945) += i945 subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I945GC) += i945
subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I945GM) += i945

28
src/northbridge/intel/i945/Kconfig
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@@ -17,38 +17,27 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
## ##
config NORTHBRIDGE_INTEL_I945 config NORTHBRIDGE_INTEL_I945GC
bool bool
select HAVE_DEBUG_RAM_SETUP select HAVE_DEBUG_RAM_SETUP
config NORTHBRIDGE_INTEL_I945GM
bool
select HAVE_DEBUG_RAM_SETUP
if NORTHBRIDGE_INTEL_I945GC || NORTHBRIDGE_INTEL_I945GM
config FALLBACK_VGA_BIOS_ID config FALLBACK_VGA_BIOS_ID
string string
default "8086,27a2" default "8086,27a2"
depends on NORTHBRIDGE_INTEL_I945
choice
default I945GM
depends on NORTHBRIDGE_INTEL_I945
help
Different i945 variants require slightly different setup.
config I945GM
bool "i945GM (Mobile) chipset"
config I945GC
bool "i945GC chipset"
endchoice
config CHANNEL_XOR_RANDOMIZATION config CHANNEL_XOR_RANDOMIZATION
bool bool
default n default n
depends on NORTHBRIDGE_INTEL_I945
config OVERRIDE_CLOCK_DISABLE config OVERRIDE_CLOCK_DISABLE
bool bool
default n default n
depends on NORTHBRIDGE_INTEL_I945
help help
Usually system firmware turns off system memory clock Usually system firmware turns off system memory clock
signals to unused SO-DIMM slots to reduce EMI and power signals to unused SO-DIMM slots to reduce EMI and power
@@ -59,8 +48,9 @@ config OVERRIDE_CLOCK_DISABLE
config MAXIMUM_SUPPORTED_FREQUENCY config MAXIMUM_SUPPORTED_FREQUENCY
int int
default 0 default 0
depends on NORTHBRIDGE_INTEL_I945
help help
If non-zero, this designates the maximum DDR frequency If non-zero, this designates the maximum DDR frequency
the board supports, despite what the chipset should be the board supports, despite what the chipset should be
capable of. capable of.
endif

22
src/northbridge/intel/i945/raminit.c
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@@ -90,7 +90,7 @@ static void sdram_dump_mchbar_registers(void)
static int memclk(void) static int memclk(void)
{ {
int offset = 0; int offset = 0;
#if CONFIG_I945GM #if defined(CONFIG_NORTHBRIDGE_INTEL_I945GM)
offset++; offset++;
#endif #endif
switch (((MCHBAR32(CLKCFG) >> 4) & 7) - offset) { switch (((MCHBAR32(CLKCFG) >> 4) & 7) - offset) {
@@ -102,7 +102,7 @@ static int memclk(void)
return -1; return -1;
} }
#if CONFIG_I945GM #if defined(CONFIG_NORTHBRIDGE_INTEL_I945GM)
static int fsbclk(void) static int fsbclk(void)
{ {
switch (MCHBAR32(CLKCFG) & 7) { switch (MCHBAR32(CLKCFG) & 7) {
@@ -113,8 +113,7 @@ static int fsbclk(void)
} }
return -1; return -1;
} }
#endif #elif defined(CONFIG_NORTHBRIDGE_INTEL_I945GC)
#if CONFIG_I945GC
static int fsbclk(void) static int fsbclk(void)
{ {
switch (MCHBAR32(CLKCFG) & 7) { switch (MCHBAR32(CLKCFG) & 7) {
@@ -1045,7 +1044,7 @@ static const u32 *slew_group_lookup(int dual_channel, int index)
return nc; return nc;
} }
#if CONFIG_I945GM #if defined(CONFIG_NORTHBRIDGE_INTEL_I945GM)
/* Strength multiplier tables */ /* Strength multiplier tables */
static const u8 dual_channel_strength_multiplier[] = { static const u8 dual_channel_strength_multiplier[] = {
0x44, 0x11, 0x11, 0x11, 0x44, 0x44, 0x44, 0x11, 0x44, 0x11, 0x11, 0x11, 0x44, 0x44, 0x44, 0x11,
@@ -1100,8 +1099,7 @@ static const u8 single_channel_strength_multiplier[] = {
0x33, 0x00, 0x00, 0x11, 0x00, 0x44, 0x33, 0x11, 0x33, 0x00, 0x00, 0x11, 0x00, 0x44, 0x33, 0x11,
0x33, 0x00, 0x11, 0x00, 0x44, 0x44, 0x33, 0x11 0x33, 0x00, 0x11, 0x00, 0x44, 0x44, 0x33, 0x11
}; };
#endif #elif defined(CONFIG_NORTHBRIDGE_INTEL_I945GC)
#if CONFIG_I945GC
static const u8 dual_channel_strength_multiplier[] = { static const u8 dual_channel_strength_multiplier[] = {
0x44, 0x22, 0x00, 0x00, 0x44, 0x44, 0x44, 0x22, 0x44, 0x22, 0x00, 0x00, 0x44, 0x44, 0x44, 0x22,
0x44, 0x22, 0x00, 0x00, 0x44, 0x44, 0x44, 0x22, 0x44, 0x22, 0x00, 0x00, 0x44, 0x44, 0x44, 0x22,
@@ -2155,7 +2153,7 @@ static void sdram_program_clock_crossing(void)
/** /**
* We add the indices according to our clocks from CLKCFG. * We add the indices according to our clocks from CLKCFG.
*/ */
#if CONFIG_I945GM #if defined(CONFIG_NORTHBRIDGE_INTEL_I945GM)
static const u32 data_clock_crossing[] = { static const u32 data_clock_crossing[] = {
0x00100401, 0x00000000, /* DDR400 FSB400 */ 0x00100401, 0x00000000, /* DDR400 FSB400 */
0xffffffff, 0xffffffff, /* nonexistant */ 0xffffffff, 0xffffffff, /* nonexistant */
@@ -2200,8 +2198,7 @@ static void sdram_program_clock_crossing(void)
0xffffffff, 0xffffffff, /* nonexistant */ 0xffffffff, 0xffffffff, /* nonexistant */
}; };
#endif #elif defined(CONFIG_NORTHBRIDGE_INTEL_I945GC)
#if CONFIG_I945GC
/* i945 G/P */ /* i945 G/P */
static const u32 data_clock_crossing[] = { static const u32 data_clock_crossing[] = {
0xffffffff, 0xffffffff, /* nonexistant */ 0xffffffff, 0xffffffff, /* nonexistant */
@@ -2792,10 +2789,9 @@ static void sdram_enable_memory_clocks(struct sys_info *sysinfo)
{ {
u8 clocks[2] = { 0, 0 }; u8 clocks[2] = { 0, 0 };
#if CONFIG_I945GM #if defined(CONFIG_NORTHBRIDGE_INTEL_I945GM)
#define CLOCKS_WIDTH 2 #define CLOCKS_WIDTH 2
#endif #elif defined(CONFIG_NORTHBRIDGE_INTEL_I945GC)
#if CONFIG_I945GC
#define CLOCKS_WIDTH 3 #define CLOCKS_WIDTH 3
#endif #endif
if (sysinfo->dimm[0] != SYSINFO_DIMM_NOT_POPULATED) if (sysinfo->dimm[0] != SYSINFO_DIMM_NOT_POPULATED)