ChromeOS: Add legacy mainboard_ec_running_ro()
Motivation is to have mainboard_chromeos_acpi_generate() do nothing else than fill ACPI \OIPG package. Change-Id: I3cb95268424dc27f8c1e26b3d34eff1a7b8eab7f Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58896 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Julius Werner <jwerner@chromium.org>
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@@ -48,6 +48,15 @@ int get_recovery_mode_switch(void)
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return 0;
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}
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bool mainboard_ec_running_ro(void)
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{
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// TODO: MLR
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// The firmware read/write status is a "virtual" switch and
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// will be handled elsewhere. Until then hard-code to
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// read/write instead of read-only for developer mode.
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return false;
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}
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static const struct cros_gpio cros_gpios[] = {
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CROS_GPIO_REC_AH(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME),
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CROS_GPIO_WP_AL(WP_GPIO, CROS_GPIO_DEVICE_NAME),
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@@ -55,13 +64,6 @@ static const struct cros_gpio cros_gpios[] = {
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void mainboard_chromeos_acpi_generate(void)
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{
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// TODO: MLR
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// The firmware read/write status is a "virtual" switch and
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// will be handled elsewhere. Until then hard-code to
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// read/write instead of read-only for developer mode.
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if (CONFIG(CHROMEOS_NVS))
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chromeos_set_ecfw_rw();
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chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
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}
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