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intel/kunimitsu Fab3: Strengthening Rcomp target CTRL value

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This patch strengthens the Rcomp Target CTRL by 10% for
8GB memory part K4E6E304EE-EGCF as with the current values
the MRC training is failing due to more load on CS#

BRANCH=None
BUG=chrome-os-partner:44647
TEST=BUilds and boots on Kunimitsu.

Change-Id: I478002bbebabaac418356d4b5b4755bb56009268
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b208659e690d8cb5b8dcaf30eed53c01b9f77f6d
Original-Change-Id: Ia0a0c1358649af77a3a0d301cb791f26f1e039bf
Original-Signed-off-by: pchandri <preetham.chandrian@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/304103
Original-Commit-Ready: Preetham Chandrian <preetham.chandrian@intel.com>
Original-Tested-by: Preetham Chandrian <preetham.chandrian@intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Preetham Chandrian <preetham.chandrian@intel.com>
Reviewed-on: http://review.coreboot.org/12143
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
pchandri
2015-09-14 14:11:38 -07:00
committed by Patrick Georgi
parent b45dde0b78
commit e57e72681f
4 changed files with 28 additions and 14 deletions
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11
src/mainboard/intel/kunimitsu/spd/spd.c
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@@ -22,14 +22,11 @@
#include <boardid.h>
#include <cbfs.h>
#include <console/console.h>
#include <gpio.h>
#include <soc/gpio.h>
#include <soc/pei_data.h>
#include <soc/romstage.h>
#include <string.h>
#include "../boardid.h"
#include "../gpio.h"
#include "spd.h"
static void mainboard_print_spd_info(uint8_t spd[])
@@ -90,14 +87,8 @@ void mainboard_fill_spd_data(struct pei_data *pei_data)
size_t spd_file_len;
int spd_index, sku_id;
gpio_t spd_gpios[] = {
GPIO_MEM_CONFIG_0,
GPIO_MEM_CONFIG_1,
GPIO_MEM_CONFIG_2,
GPIO_MEM_CONFIG_3,
};
spd_index = gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios));
spd_index = pei_data->mem_cfg_id;
/*
* XXX: This is incorrect usage.The Board ID should be the revision ID
* and not SKU ID but on SCRD it indicates SKU.