intel post-car: Consolidate choose_top_of_stack()
Change-Id: I2c49d68ea9a8f52737b6064bc4fa703bdb1af1df Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/15463 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@@ -99,10 +99,6 @@ config GOP_SUPPORT
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bool "Enable GOP support"
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default n
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config ROMSTAGE_RAM_STACK_SIZE
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hex "Size of the romstage RAM stack in bytes"
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default 0x5000
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config USE_GENERIC_FSP_CAR_INC
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bool
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default n
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@@ -21,23 +21,7 @@
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#include <fsp/romstage.h>
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#include <fsp/stack.h>
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#include <stdlib.h>
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const unsigned long romstage_ram_stack_size = CONFIG_ROMSTAGE_RAM_STACK_SIZE;
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/*
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* Romstage needs quite a bit of stack for decompressing images since the lzma
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* lib keeps its state on the stack during romstage.
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*/
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static unsigned long choose_top_of_stack(void)
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{
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unsigned long stack_top;
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/* cbmem_add() does a find() before add(). */
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stack_top = (unsigned long)cbmem_add(CBMEM_ID_ROMSTAGE_RAM_STACK,
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romstage_ram_stack_size);
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stack_top += romstage_ram_stack_size;
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return stack_top;
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}
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#include <program_loading.h>
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/*
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* setup_stack_and_mtrrs() determines the stack to use after
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@@ -57,7 +41,7 @@ void *setup_stack_and_mtrrs(void)
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soc_display_mtrrs();
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/* Top of stack needs to be aligned to a 8-byte boundary. */
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top_of_stack = choose_top_of_stack();
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top_of_stack = romstage_ram_stack_top();
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slot = (void *)top_of_stack;
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num_mtrrs = 0;
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max_mtrrs = soc_get_variable_mtrr_count(NULL);
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@@ -68,8 +52,7 @@ void *setup_stack_and_mtrrs(void)
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*/
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mtrr_mask_upper = (1 << ((cpuid_eax(0x80000008) & 0xff) - 32)) - 1;
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alignment = mmap_region_granularity();
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aligned_ram = ALIGN_DOWN(top_of_stack - romstage_ram_stack_size,
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alignment);
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aligned_ram = ALIGN_DOWN(romstage_ram_stack_bottom(), alignment);
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/*
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* The order for each MTRR is value then base with upper 32-bits of
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